Asymmetrical N-channel and P-channel devices

Claim 2

An IGFET pair, comprising: an asymmetrical N-channel IGFET, including: a first gate insulator on a first active region of a semiconductor substrate; a first gate on the first gate insulator, wherein the first gate includes opposing sidewalls formed during a single etch step; a first source including a first heavily doped source region adjacent to a first ultra-heavily doped source region, wherein the first heavily doped source region forms a first channel junction and the first ultra-heavily doped source region is spaced from the first channel junction; and a first drain including a first lightly doped drain region adjacent to a first heavily doped drain region, wherein the first lightly doped drain region forms a second channel junction and the first heavily doped drain region is spaced from the second channel junction, and the first ultra-heavily doped source region has a greater doping concentration than any portion of the first drain; and an asymmetrical P-channel IGFET, including: a second gate insulator on a second active region of the semiconductor substrate; a second gate on the second gate insulator, wherein the second gate includes opposing sidewalls formed during a single etch step; a second source including a second heavily doped source region adjacent to a second ultra-heavily doped source region, wherein the second heavily doped source region forms a third channel junction and the second ultra-heavily doped source region is spaced from the third channel junction; and a second drain including a second lightly doped drain region adjacent to a second heavily doped drain region, wherein the second lightly doped drain region forms a fourth channel junction and the second heavily doped drain region is spaced from the fourth channel junction, the second ultra-heavily doped source region has a greater doping concentration than any portion of the second drains and a doping concentration of the first and second ultra-heavily doped source regions is at most about 10 times that of the first and second heavily doped drain regions.

Claim 3

The IGFET pair of claim 1, wherein: the first source consists of the first heavily doped and ultra-heavily doped source regions, and the first drain consists of the first lightly doped and heavily doped drain regions; and the second source consists of the second heavily doped and ultra-heavily doped source regions, and the second drain consists of the second lightly doped and heavily doped drain regions.

Claim 4

The IGFET pair of claim 1, wherein: the first and second gate insulators are on a top surface of the substrate; the first heavily doped and ultra-heavily doped source regions and the first lightly doped and heavily doped drain regions extend to the top surface; and the second heavily doped and ultra-heavily doped source regions and the second lightly doped and heavily doped drain regions extend to the top surface.

Claim 5

The IGFET pair of claim 1, wherein: a dopant concentration of the first and second heavily doped source and drain regions is in the range of 10 to 100 times that of the first and second lightly doped drain regions; and a dopant concentration of the first and second ultra-heavily doped source regions is in the range of 1.5 to 10 times that of the first and second heavily doped source and drain regions.

Claim 6

The IGFET pair of claim 4, wherein: the dopant concentration of the first and second lightly doped drain regions is in the range of about 1×10 17 to 5×10 18 atoms/cm 3 ; the dopant concentration of the first and second heavily doped source and drain regions is in the range of about 1×10 19 to 1×10 20 atoms/cm 3 ; and the dopant concentration of the first and second ultra-heavily doped source regions is in the range of about 1.5×10 19 to 1×10 21 atoms/cm 3 .

Claim 7

The IGFET pair of claim 1, wherein the N-channel IGFET and the P-channel IGFET are adjacent to an isolation region in the substrate.

Claim 8

The IGFET pair of claim 1, wherein the N-channel IGFET and the P-channel IGFET provide an inverter circuit.

Claim 9

The IGFET pair of claim 1, wherein: the first source and the first drain are doped with a dopant selected from the group consisting of arsenic, phosphorus, and combinations thereof; and the second source and the second drain are doped with a dopant selected from the group consisting of boron, boron species and combinations thereof.

Claim 10

An IGFET pair, comprising: a semiconductor substrate with a first active region of a first conductivity type and a second active region of a second conductivity type; a first asymmetrical IGFET, including: a first gate on a first gate insulator over the first active region, wherein the first gate includes opposing sidewalls formed during a single etch step; a first source in the first active region, wherein the first source includes first heavily doped and ultra-heavily doped source regions that are adjacent to one another, the first heavily doped source region forms a first channel junction, and the first ultra-heavily doped source region is spaced from the first channel junction; and a first drain in the first active region, wherein the first drain includes first lightly doped and heavily doped drain regions that are adjacent to one another, the first lightly doped drain region forms a second channel junction, the first heavily doped drain region is spaced from the second channel junction, the first ultra-heavily doped source region has a greater doping concentration than any portion of the first drain, and a doping concentration of the first ultra-heavily doped source region is at most about 10 times that of the first heavily doped drain region; and a second asymmetrical IGFET, including: a second gate on a second gate insulator over the second active region; a second source in the second active region; and a second drain in the second active region.

Claim 11

An IGFET pair, comprising: a semiconductor substrate with a first active region of a first conductivity type and a second active region of a second conductivity type; a first asymmetrical IGFET, including: a first gate on a first gate insulator over the first active region, wherein the first gate includes opposing sidewalls formed during a single etch step; a first source in the first active region, wherein the first source includes first heavily doped and ultra-heavily doped source regions that are adjacent to one another, the first heavily doped source region forms a first channel junction, and the first ultra-heavily doped source region is spaced from the first channel junction; and a first drain in the first active region, wherein the first drain includes first lightly doped and heavily doped drain regions that are adjacent to one another, the first lightly doped drain region forms a second channel junction, the first heavily doped drain region is spaced from the second channel junction, the first ultra-heavily doped source region has a greater doping concentration than any portion of the first drain, and a doping concentration of the first ultra-heavily doped source region is at most about 10 times that of the first heavily doped drain region; and a second asymmetrical IGFET, including: a second gate on a second gate insulator over the second active region; a second source in the second active region; and a second drain in the second active region.

Claim 12

The IGFET pair of claim 9, wherein the first source consists of the first heavily doped and ultra-heavily doped source regions, and the first drain consists of the first lightly doped and heavily doped drain regions.

Claim 13

The IGFET pair of claim 10, wherein the first heavily doped and ultra-heavily doped source regions and the first lightly doped and heavily doped drain regions extend to a top surface of the substrate.

Claim 14

The IGFET pair of claim 9, wherein: a dopant concentration of the first heavily doped source and drain regions is at least 10 times that of the first lightly doped drain region; and a dopant concentration of the first ultra-heavily doped source region is at least 1.5 times that of the first heavily doped source and drain regions.

Claim 15

The IGFET pair of claim 12, wherein: the dopant concentration of the first lightly doped drain region is in the range of about 1×10 17 to 5×10 18 atoms/cm 3 ; the dopant concentration of the first heavily doped source and drain regions is in the range of about 1×10 19 to 1×10 20 atoms/cm 3 ; and the dopant concentration of the first ultra-heavily doped source region is in the range of about 1.5×10 19 to 1×10 21 atoms/cm 3 .

Claim 16

The IGFET pair of claim 9, wherein: the second source includes second heavily doped and ultra-heavily doped source regions that are adjacent to one another, the second heavily doped source region forms a third channel junction and the second ultra-heavily doped source region is spaced from the third channel junction; and the second drain includes second lightly doped and heavily doped drain regions that are adjacent to one another, the second lightly doped drain region forms a fourth channel junction, the second heavily doped drain region is spaced from the fourth channel junction, and the second ultra-heavily doped source region has a greater doping concentration than any portion of the second drain.

Claim 17

The IGFET pair of claim 14, wherein the second source consists of the second heavily doped and ultra-heavily doped source regions, and the second drain consists of the second lightly doped and heavily doped drain regions.

Claim 18

The IGFET pair of claim 14, wherein the second heavily doped and ultra-heavily doped source regions and the second lightly doped and heavily doped drain regions extend to a top surface of the substrate.

Claim 19

The IGFET pair of claim 9, wherein the first asymmetrical IGFET and the second asymmetrical IGFET are adjacent to an isolation region in the substrate.

Claim 20

The IGFET pair of claim 9, wherein the first asymmetrical IGFET and the second asymmetrical IGFET provide an inverter circuit.

Claim 21

An integrated circuit chip, including the IGFET pair of claim 9.

Claim 22

An electronic system including a microprocessor, a memory and a system bus, and further including the IGFET pair of claim 9.

Claim 23

The IGFET pair of claim 1, wherein a doping concentration of the first and second heavily doped source regions is essentially identical to that of the first and second heavily doped drain regions.

Claim 24

The IGFET pair of claim 9, wherein a doping concentration of the first heavily doped source region is essentially identical to that of the first heavily doped drain region.

Claim 25

An IGFET pair, comprising: an asymmetrical N-channel IGFET, including: a first gate insulator on a first active region of a semiconductor substrate; a first gate on the first gate insulator, wherein the first gate includes opposing sidewalls formed during a single etch step; a first source including a first heavily doped source region adjacent to a first ultra-heavily doped source region, wherein the first heavily doped source region forms a first channel junction and the first ultra-heavily doped source region is spaced from the first channel junction; and a first drain including a first lightly doped drain region adjacent to a first heavily doped drain region, wherein the first lightly doped drain region forms a second channel junction, the first heavily doped drain region is spaced from the second channel junction and the first ultra-heavily doped source region has a greater doping concentration than any portion of the first drain; and an asymmetrical P-channel IGFET, including: a second gate insulator on a second active region of the semiconductor substrate; a second gate on the second gate insulator, wherein the second gate includes opposing sidewalls formed during a single etch step; a second source including a second heavily doped source region adjacent to a second ultra-heavily doped source region, wherein the second heavily doped source region forms a third channel junction and the second ultra-heavily doped source region is spaced from the third channel junction; and a second drain including a second lightly doped drain region adjacent to a second heavily doped drain region, wherein the second lightly doped drain region forms a fourth channel junction, the second heavily doped drain region is spaced from the fourth channel junction, the second ultra-heavily doped source region has a greater doping concentration than any portion of the second drain, a dopant concentration of the first and second heavily doped source and drain regions is in the range of 10 to 100 times that of the first and second lightly doped drain regions, and a dopant concentration of the first and second ultra-heavily doped source regions is in the range of 1.5 to 10 times that of the first and second heavily doped source and drain regions.

Claim 26

An IGFET pair, comprising: an asymmetrical N-channel IGFET, including: a first gate insulator on a first active region of a semiconductor substrate; a first gate on the first gate insulator, wherein the first gate includes opposing sidewalls formed during a single etch step; a first source including a first heavily doped source region adjacent to a first ultra-heavily doped source region, wherein the first heavily doped source region forms a first channel junction and the first ultra-heavily doped source region is spaced from the first channel junction; and a first drain including a first lightly doped drain region adjacent to a first heavily doped drain region, wherein the first lightly doped drain region forms a second channel junction, the first heavily doped drain region is spaced from the second channel junction and the first ultra-heavily doped source region has a greater doping concentration than any portion of the first drain; and an asymmetrical P-channel IGFET, including: a second gate insulator on a second active region of the semiconductor substrate; a second gate on the second gate insulator, wherein the second gate includes opposing sidewalls formed during a single etch step; a second source including a second heavily doped source region adjacent to a second ultra-heavily doped source region, wherein the second heavily doped source region forms a third channel junction and the second ultra-heavily doped source region is spaced from the third channel junction; and a second drain including a second lightly doped drain region adjacent to a second heavily doped drain region, wherein the second lightly doped drain region forms a fourth channel junction, the second heavily doped drain region is spaced from the fourth channel junction, the second ultra-heavily doped source region has a greater doping concentration than any portion of the second drain, a dopant concentration of the first and second heavily doped source and drain regions is in the range of 10 to 100 times that of the first and second lightly doped drain regions, and a dopant concentration of the first and second ultra-heavily doped source regions is in the range of 1.5 to 10 times that of the first and second heavily doped source and drain regions.

Claim 27

An IGFET pair, comprising: a semiconductor substrate with a first active region of a first conductivity type and a second active region of a second conductivity type; a first asymmetrical IGFET, including: a first gate on a first gate insulator over the first active region, wherein the first gate includes opposing sidewalls formed during a single etch step; a first source in the first active region, wherein the first source includes first heavily doped and ultra-heavily doped source regions that are adjacent to one another, the first heavily doped source region forms a first channel junction and the first ultra-heavily doped source region is spaced from the first channel junction; and a first drain in the first active region, wherein the first drain includes first lightly doped and heavily doped drain regions that are adjacent to one another, the first lightly doped drain region forms a second channel junction, the first heavily doped drain region is spaced from the second channel junction, the first ultra-heavily doped source region has a greater doping concentration than any portion of the first drain, the dopant concentration of the first lightly doped drain region is in the range of about 1×10 17 to 5×10 18 atoms/cm 3 , the dopant concentration of the first heavily doped source and drain regions is in the range of about 1×10 19 to 1×10 20 atoms/cm 3 , and the dopant concentration of the first ultra-heavily doped source region is in the range of about 1.5×10 19 to 1×10 21 atoms/cm 3 ; and a second asymmetrical IGFET, including: a second gate on a second gate insulator over the second active region; a second source in the second active region; and a second drain in the second active region.

Claim 28

An IGFET pair, comprising: a semiconductor substrate with a first active region of a first conductivity type and a second active region of a second conductivity type; a first asymmetrical IGFET, including: a first gate on a first gate insulator over the first active region, wherein the first gate includes opposing sidewalls formed during a single etch step; a first source in the first active region, wherein the first source includes first heavily doped and ultra-heavily doped source regions that are adjacent to one another, the first heavily doped source region forms a first channel junction and the first ultra-heavily doped source region is spaced from the first channel junction; and a first drain in the first active region, wherein the first drain includes first lightly doped and heavily doped drain regions that are adjacent to one another, the first lightly doped drain region forms a second channel junction, the first heavily doped drain region is spaced from the second channel junction, the first ultra-heavily doped source region has a greater doping concentration than any portion of the first drain, the dopant concentration of the first lightly doped drain region is in the range of about 1×10 17 to 5×10 18 atoms/cm 3 , the dopant concentration of the first heavily doped source and drain regions is in the range of about 1×10 19 to 1×10 20 atoms/cm 3 , and the dopant concentration of the first ultra-heavily doped source region is in the range of about 1.5×10 19 to 1×10 21 atoms/cm 3 ; and a second asymmetrical IGFET, including: a second gate on a second gate insulator over the second active region; a second source in the second active region; and a second drain in the second active region.