EP0187016A2
Expired / Lapsed
EP
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MISFET with lightly doped drain and method of manufacturing the same
Assignee: Toshiba Corp
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Filing: 1985-12-18
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Granted: —
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Expires: 2005-12-18
Abstract
Abstract The invention provides a semiconductor device and a manufacturing method therefor. The semiconductor device comprises a semiconductor substrate (1) of a first conductivity type, source and drain regions (9, 10) of a second conductivity type provided on the surface of the substrate in a mutually electrically isolated arrangement, and a gate electrode (4) provided on the surface of the substrate on the other side of an insulating film. The substrate surface includes a channel region between the source and drain regions; at least the drain region, of the source and drain regions, consisting of a first impurity diffusion region (5 1 , 5 2 ) provided on the substrate surface in the vicinity of an end portion of the gate electrode (4); a second impurity diffusion region (6 1 , 6 2 ) more highly doped than the first impurity diffusion region and provided in at least a portion of the surface of the first impurity diffusion region (5 1 , 5 2 ) adjacent an end portion of the first impurity diffusion region (6 1 , 5 2 ) and a third impurity diffusion region (8 1 , 8 2 ) more highly doped than the second impurity diffusion region and provided on the substrate surface adjacent to an end portion of the second impurity diffusion region (6 1 , 6 2 ). The first impurity diffusion region (5 1 , 5 2 ) is formed using the gate electrode (4) as a mask and the second and third impurity regions (6 1 , 6 2 , 8 1 , 8 2 ) are formed using self-alignment techniques.
Inventors
- 👤 Yoshiaki C/O Patent Division Toyoshima
Bibliographic Details
Application Number
—
Jurisdiction
EP
Data Source
google_patents
Last Synchronized
2026-10-28 13:32
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0223; H10D30/0227; H10D30/60; H10D30/601; H10D30/605; Y; Y10; Y10S; Y10S257/00; Y10S257/90
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
223 words
A semiconductor device comprising: a semiconductor substrate (1) of a first conductivity type: source and drain regions (9, 10) of a second conductivity type, provided in a mutually electrically isolated arrangement on the surface of said substrate (1); a gate electrode (4), provided on the surface of said substrate (1), on the other side of an insulating film (3), which surface of said substrate includes a channel region between said source and drain regions (9,10); characterised in that: at least said drain region, of said source and drain regions (9,10), consists of: a first impurity diffusion region (5 1 , 5 2 ) provided in said substrate surface and positioned in the vicinity of an end portion of said gate electrode (4); a second impurity diffusion region (6 1 , 6 2 ), more highly doped than said first diffusion region (5 1 , 5 2 ) and provided on the substrate surface at least partly adjacent an end portion of said first impurity region (5 1 , 5 2 ); and a third impurity diffusion region (8 1 , 8 2 ), more highly doped than said second impurity diffusion region (6 1 , 6 2 ) and provided at a position on said substrate surface adjacent an end portion of said second impurity diffusion region (6 1 , 6 2 ).
Claim 2
Dependent Claim
223 words
A semiconductor device comprising: a semiconductor substrate (1) of a first conductivity type: source and drain regions (9, 10) of a second conductivity type, provided in a mutually electrically isolated arrangement on the surface of said substrate (1); a gate electrode (4), provided on the surface of said substrate (1), on the other side of an insulating film (3), which surface of said substrate includes a channel region between said source and drain regions (9,10); characterised in that: at least said drain region, of said source and drain regions (9,10), consists of: a first impurity diffusion region (5 1 , 5 2 ) provided in said substrate surface and positioned in the vicinity of an end portion of said gate electrode (4); a second impurity diffusion region (6 1 , 6 2 ), more highly doped than said first diffusion region (5 1 , 5 2 ) and provided on the substrate surface at least partly adjacent an end portion of said first impurity region (5 1 , 5 2 ); and a third impurity diffusion region (8 1 , 8 2 ), more highly doped than said second impurity diffusion region (6 1 , 6 2 ) and provided at a position on said substrate surface adjacent an end portion of said second impurity diffusion region (6 1 , 6 2 ).
Claim 3
Dependent Claim
37 words
A semiconductor device according to claim 1, wherein first and second wall members (26, 28) formed of two types of insulating materials of mutually different widths are provided on the lateral faces of said gate electrode (24).
Claim 4
Dependent Claim
56 words
A semiconductor device according to claim 2, wherein said first, second and third impurity diffusion regions (25 1 , 25 2 , 27 1 , 27 2 , 29 1 , 29 2 ) are formed in a self-alignment manner with respect to said gate electrode (24) and said first and second wall members (26, 28).
Claim 5
Independent Claim
214 words
A method of manufacturing a semiconductor device comprising the steps of: selectively forming a field insulating film (22) on a semiconductor substrate (21) of a first conductivity type; and forming a gate insulating film (23) on said semiconductor substrate surface, followed by formation of a gate electrode (24); characterised by: forming a first impurity diffusion region (25 1 , 25 2 ) of a second conductivity type on said semiconductor substrate surface, using said gate electrode (24) as a mask; forming a first insulating film (26) on the top and lateral faces of said gate electrode, followed by formation of a second impurity diffusion region (27 1 , 27 2 ), of the second conductivity type and having a higher concentration than said first impurity diffusion region (25 1 , 25 2 ), in said semiconductor substrate surface, using said first insulating film (26) as a mask; and forming a second insulating film (28) on the lateral faces of said first insulating film (26), followed by formation of a third impurity diffusion region (29 1 , 29 2 ) of second conductivity type and having a higher concentration than sid second impurity diffusion region (27 1 , 27 2 ), in said semiconductor substrate surface, using said second insulating film (28) as a mask.
Claim 6
Independent Claim
214 words
A method of manufacturing a semiconductor device comprising the steps of: selectively forming a field insulating film (22) on a semiconductor substrate (21) of a first conductivity type; and forming a gate insulating film (23) on said semiconductor substrate surface, followed by formation of a gate electrode (24); characterised by: forming a first impurity diffusion region (25 1 , 25 2 ) of a second conductivity type on said semiconductor substrate surface, using said gate electrode (24) as a mask; forming a first insulating film (26) on the top and lateral faces of said gate electrode, followed by formation of a second impurity diffusion region (27 1 , 27 2 ), of the second conductivity type and having a higher concentration than said first impurity diffusion region (25 1 , 25 2 ), in said semiconductor substrate surface, using said first insulating film (26) as a mask; and forming a second insulating film (28) on the lateral faces of said first insulating film (26), followed by formation of a third impurity diffusion region (29 1 , 29 2 ) of second conductivity type and having a higher concentration than sid second impurity diffusion region (27 1 , 27 2 ), in said semiconductor substrate surface, using said second insulating film (28) as a mask.
Claim 7
Dependent Claim
38 words
A method of manufacturing a semiconductor device according to claim 4, wherein said gate electrode (24) consists of a polycrystalline silicon film and said first insulating film (26) is formed by partial oxidation of said polycrystalline silicon film.
Claim 8
Dependent Claim
30 words
A method of manufacturing a semiconductor device according to claim 5, wherein said first impurity diffusion region (25 1 , 25 2 ) is formed by implantation of phosphorus ions.
Claim 9
Dependent Claim
38 words
A method of manufacturing a semiconductor device according to claim 6, wherein said second and third impurity diffusion regions (27 1 , 27 2 , 29 1 . 29 2 ) are formed by implantation of arsenic ions.
References Cited (Backward Citations)
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