US5763829A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Leadframe including frame-cutting slit for lead-on-chip (LOC) semiconductor device and semiconductor device incorporating the leadframe
Assignee: Mitsubishi Electric Corp
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Filing: 1995-07-25
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Granted: 1998-06-09
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Expires: 2015-07-25
Abstract
Abstract A high-reliability semiconductor device and a method of producing the device. Absorption of moisture into a semiconductor device is effectively avoided by using a hard solder material, such as common solder having no moisture absorption, for die-bonding a semiconductor chip to a die pad. Thus, in the semiconductor device in accordance with the present inventions there are no corrosion problems nor package-cracking due to absorbed moisture.
Inventors
- 👤 Yoshihiro Tomita
- 👤 Naoto Ueda
- 👤 Yoshirou Nishinaka
- 👤 Shunichi Abe
- 👤 Hideyuki Ichiyama
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 09:54
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/01; H10W70/04; H10W70/048; H10W70/40; H10W70/411; H10W70/415; H10W70/421; H10W70/424; H10W70/427; H10W70/442; H10W74/00; H10W74/01; H10W74/016; H10W74/10; H10W90/00; H10W90/811; H10W72/00; H10W72/071; H10W72/073; H10W72/07331; H10W72/07336; H10W72/075; H10W72/07531; H10W72/07532; H10W72/07533; H10W72/30; H10W72/351; H10W72/353; H10W72/354; H10W72/50; H10W72/541; H10W72/5449; H10W72/547; H10W72/5473; H10W72/551; H10W72/552; H10W72/59; H10W72/851; H10W72/874; H10W72/884; H10W72/90; H10W72/931; H10W72/932; H10W72/941; H10W72/944; H10W72/9445; H10W72/951; H10W90/701; H10W90/731; H10W90/736; H10W90/751; H10W90/756; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49121; Y10T29/49124; Y10T29/4913; Y10T29/49146; Y10T29/49169; Y10T29/49171; Y10T29/49172
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
209 words
A leadframe for producing a semiconductor device having a lead-on-chip (LOC) structure wherein leads extend across a semiconductor chip comprising: a frame for a die pad comprising an outer frame section, a die pad displaced from said outer frame section, and a suspending lead connecting said die pad to said outer frame section wherein said die pad is disposed inside said outer frame section; and a frame for leads comprising an outer frame portion and a plurality of leads extending from opposite sides of said outer frame portion and having at least one frame-cutting slit in said outer frame portion exposing said suspending lead for severing and removing an unnecessary portion of said frame for a die pad after said frame for leads is connected to said frame for a die pad, leaving said die pad connected to said frame for leads at said suspending lead, wherein one of said frame for a die pad and said frame for leads includes a projection and the other of said frame for a die pad and said frame for leads includes a hole, the hole receiving said projection, said projection being disposed parallel to said frame for leads, thereby connecting said frame for a die pad to said frame for leads.
Claim 2
Dependent Claim
209 words
A leadframe for producing a semiconductor device having a lead-on-chip (LOC) structure wherein leads extend across a semiconductor chip comprising: a frame for a die pad comprising an outer frame section, a die pad displaced from said outer frame section, and a suspending lead connecting said die pad to said outer frame section wherein said die pad is disposed inside said outer frame section; and a frame for leads comprising an outer frame portion and a plurality of leads extending from opposite sides of said outer frame portion and having at least one frame-cutting slit in said outer frame portion exposing said suspending lead for severing and removing an unnecessary portion of said frame for a die pad after said frame for leads is connected to said frame for a die pad, leaving said die pad connected to said frame for leads at said suspending lead, wherein one of said frame for a die pad and said frame for leads includes a projection and the other of said frame for a die pad and said frame for leads includes a hole, the hole receiving said projection, said projection being disposed parallel to said frame for leads, thereby connecting said frame for a die pad to said frame for leads.
Claim 3
Dependent Claim
270 words
A semiconductor device having a lead-on-chip (LOC) structure comprising: a semiconductor chip having first and second primary surfaces and a plurality of electrodes centrally disposed on said first primary surface; a frame for a die pad including a die pad and a suspending lead connected to said die pad, said semiconductor chip being bonded to said die pad at said second primary surface, a frame for leads comprising an outer frame portion and a plurality of leads extending from opposite sides of said outer frame portion, said frame for leads including at least one frame cutting slit in said outer frame portion providing access to said suspending lead for severing and removing an unnecessary portion of said frame for a die pad, said frame for a die pad and said frame for leads being connected at said outer frame portion so that said suspending lead is connected to said outer frame portion, said die pad is displaced from said outer frame portion, and inner lead portions of said leads extend across and are spaced from the first primary surface of said semiconductor chip, wherein one of said frame for a die pad and said frame for leads includes a projection and the other of said frame for a die pad and said frame for leads includes a hole receiving the projection wherein the projection is parallel to said outer frame portion; metal wires bonded to respective ones of said electrodes and corresponding ones of said inner lead portions; and a resin encapsulating said semiconductor chip, said die pad, and said wires, said outer frame portion and said inner lead portions.
Claim 4
Dependent Claim
270 words
A semiconductor device having a lead-on-chip (LOC) structure comprising: a semiconductor chip having first and second primary surfaces and a plurality of electrodes centrally disposed on said first primary surface; a frame for a die pad including a die pad and a suspending lead connected to said die pad, said semiconductor chip being bonded to said die pad at said second primary surface, a frame for leads comprising an outer frame portion and a plurality of leads extending from opposite sides of said outer frame portion, said frame for leads including at least one frame cutting slit in said outer frame portion providing access to said suspending lead for severing and removing an unnecessary portion of said frame for a die pad, said frame for a die pad and said frame for leads being connected at said outer frame portion so that said suspending lead is connected to said outer frame portion, said die pad is displaced from said outer frame portion, and inner lead portions of said leads extend across and are spaced from the first primary surface of said semiconductor chip, wherein one of said frame for a die pad and said frame for leads includes a projection and the other of said frame for a die pad and said frame for leads includes a hole receiving the projection wherein the projection is parallel to said outer frame portion; metal wires bonded to respective ones of said electrodes and corresponding ones of said inner lead portions; and a resin encapsulating said semiconductor chip, said die pad, and said wires, said outer frame portion and said inner lead portions.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-06-08 | 2001-12-08 | 2002-06-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-06-08 | 2005-12-08 | 2006-06-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-06-08 | 2009-12-08 | 2010-06-09 | $7700.00 | Window Closed / Lapsed |