US5334803A
Expired / Lapsed
US
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Semiconductor device and method of producing the same
Assignee: Mitsubishi Electric Corp
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Filing: 1992-10-28
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Granted: 1994-08-02
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Expires: 2012-10-28
Abstract
Abstract A semiconductor device of the present invention accommodates a large semiconductor chip in a downsized package without impairing its reliability. The semiconductor chip is bonded on a relatively small die pad. Common inner leads and a plurality of inner leads are disposed opposite and spaced from the semiconductor chip by a gap ranging from 0.1 mm to 0.4 mm and the gap between the semiconductor chip and the common inner leads and the plurality of inner leads is filled with a resin which forms part of a resin package.
Inventors
- 👤 Ken Yamamura
- 👤 Naoto Ueda
- 👤 Kazunari Michii
- 👤 Hitoshi Fujimoto
- 👤 Kiyoaki Tsumura
- 👤 Hitoshi Sasaki
- 👤 Takashi Miyamoto
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 03:19
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/40; H10W70/411; H10W70/415; H10W70/421; H10W70/424; H10W70/427; H10W70/442; H10W72/00; H10W72/01; H10W72/0198; H10W72/071; H10W72/0711; H10W72/07141; H10W72/075; H10W72/07521; H10W72/07531; H10W72/07532; H10W72/07533; H10W72/50; H10W72/531; H10W72/536; H10W72/5363; H10W72/541; H10W72/5449; H10W72/551; H10W72/552; H10W72/5522; H10W72/581; H10W72/59; H10W72/90; H10W72/931; H10W72/932; H10W72/941; H10W72/944; H10W72/9445; H10W72/951; H10W74/00; H10W90/00; H10W90/701; H10W90/751; H10W90/756; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49124; Y10T29/4913; Y10T29/49146; Y10T29/49155; Y10T29/49158; Y10T29/49169; Y10T29/49171
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
234 words
A semiconductor device comprising: a semiconductor chip having a first surface, an opposed second surface, and a plurality of electrode pads linearly disposed substantially on a longitudinal center line of the first surface of said semiconductor chip; a die-pad bonded to the second surface of said semiconductor chip to support the chip and having a smaller area than said semiconductor chip; at least one common inner-lead disposed opposite and spaced from the first surface of said semiconductor chip and substantially parallel to the longitudinal center line; a plurality of inner leads disposed adjacent to corresponding electrode pads opposite and spaced from the first surface of said semiconductor chip; a plurality of metallic wires electrically connecting respective electrode pads with one of the common inner-lead and the corresponding inner lead; a resin package encapsulating said semiconductor chip, said die-pad, said common inner-lead, said plurality of inner leads, and said plurality of wires; at least one common outer-lead integrally connected with said common inner-lead and exposed outside said resin package; and a plurality of outer leads, each outer lead being unitary with a corresponding inner lead and exposed outside said resin package wherein said common inner-lead and said plurality of inner leads are spaced from the first surface of said semiconductor chip by a gap ranging from 0.1 mm to 0.4 mm and the gap is filled with resin that is part of said resin package.
Claim 2
Dependent Claim
234 words
A semiconductor device comprising: a semiconductor chip having a first surface, an opposed second surface, and a plurality of electrode pads linearly disposed substantially on a longitudinal center line of the first surface of said semiconductor chip; a die-pad bonded to the second surface of said semiconductor chip to support the chip and having a smaller area than said semiconductor chip; at least one common inner-lead disposed opposite and spaced from the first surface of said semiconductor chip and substantially parallel to the longitudinal center line; a plurality of inner leads disposed adjacent to corresponding electrode pads opposite and spaced from the first surface of said semiconductor chip; a plurality of metallic wires electrically connecting respective electrode pads with one of the common inner-lead and the corresponding inner lead; a resin package encapsulating said semiconductor chip, said die-pad, said common inner-lead, said plurality of inner leads, and said plurality of wires; at least one common outer-lead integrally connected with said common inner-lead and exposed outside said resin package; and a plurality of outer leads, each outer lead being unitary with a corresponding inner lead and exposed outside said resin package wherein said common inner-lead and said plurality of inner leads are spaced from the first surface of said semiconductor chip by a gap ranging from 0.1 mm to 0.4 mm and the gap is filled with resin that is part of said resin package.
Claim 3
Dependent Claim
24 words
The device as defined in claim 1 wherein said common inner-lead is divided at a center of said longitudinal center line into two sections.
Claim 4
Dependent Claim
26 words
The device as defined in claim 1 including at least one supporting inner-lead connected centrally to each common inner-lead for supporting the respective connected common inner-lead.
Claim 5
Dependent Claim
44 words
The device as defined in claim 1 wherein the gap between the first surface of said semiconductor chip and said at least one common inner-lead is not greater than the gap between the first surface of the chip and said plurality of inner leads.
Claim 6
Dependent Claim
20 words
The device as defined in claim 1 including a die-pad located adjacent to each longitudinal end of said semiconductor chip.
Claim 7
Dependent Claim
22 words
The device as defined in claim 1 wherein each inner lead includes an end bent to contact and contacting said semiconductor chip.
Claim 8
Dependent Claim
33 words
The device as defined in claim 1 including an insulating film disposed directly on each of said common inner-leads, said insulating film being interposed between each of said common inner-leads and said wires.
Claim 9
Dependent Claim
28 words
The device as defined in claim 1 including a block on each of said inner leads to prevent said wires from contacting said at least one common inner-lead.
Claim 10
Dependent Claim
20 words
The device as defined in claim 1 including a chamfered portion on each common inner-lead adjacent to said inner leads.
Claim 11
Dependent Claim
23 words
The device as defined in claim 1 including a recess in each common inner-lead where one of said wires crosses said common inner-lead.
Claim 12
Dependent Claim
293 words
A semiconductor device comprising: a semiconductor chip having a first surface, an opposed second surface, a first pad-group including a plurality of electrode pads linearly disposed substantially on a longitudinal center line of the first surface of said semiconductor chip, and second and third pad-groups, each including a plurality of electrode pads linearly disposed on opposite sides of the first pad-group; a die-pad bonded to the second surface of said semiconductor chip to support the chip and having a smaller area than said semiconductor chip; first and second common inner-leads disposed opposite and spaced from the first surface of said semiconductor chip and disposed on opposite sides of the first pad-group between the second and third pad-groups; a plurality of inner leads spaced from and opposite the first surface of said semiconductor chip beyond the second and third electrode-pad groups; a plurality of metallic wires electrically connecting each first electrode pad with a corresponding one of the first and second common inner-leads and electrically connecting respective pads of the second and third pad-groups with corresponding inner leads; a resin package encapsulating said semiconductor chip, said die-pad, the first and second common inner-leads, said plurality of inner leads, and said plurality of wires; first and second common outer-leads respectively integrally connected with the first and second common inner-leads and each exposed outside said resin package; and a plurality of outer leads, each outer lead being unitary with a corresponding inner lead and exposed outside said resin package wherein the first and second common inner-leads and said plurality of inner leads are spaced from the first surface of said semiconductor chip by a gap ranging from 0.1 mm to 0.4 mm and the gap is filled with resin that is part of said resin package.
Claim 13
Dependent Claim
293 words
A semiconductor device comprising: a semiconductor chip having a first surface, an opposed second surface, a first pad-group including a plurality of electrode pads linearly disposed substantially on a longitudinal center line of the first surface of said semiconductor chip, and second and third pad-groups, each including a plurality of electrode pads linearly disposed on opposite sides of the first pad-group; a die-pad bonded to the second surface of said semiconductor chip to support the chip and having a smaller area than said semiconductor chip; first and second common inner-leads disposed opposite and spaced from the first surface of said semiconductor chip and disposed on opposite sides of the first pad-group between the second and third pad-groups; a plurality of inner leads spaced from and opposite the first surface of said semiconductor chip beyond the second and third electrode-pad groups; a plurality of metallic wires electrically connecting each first electrode pad with a corresponding one of the first and second common inner-leads and electrically connecting respective pads of the second and third pad-groups with corresponding inner leads; a resin package encapsulating said semiconductor chip, said die-pad, the first and second common inner-leads, said plurality of inner leads, and said plurality of wires; first and second common outer-leads respectively integrally connected with the first and second common inner-leads and each exposed outside said resin package; and a plurality of outer leads, each outer lead being unitary with a corresponding inner lead and exposed outside said resin package wherein the first and second common inner-leads and said plurality of inner leads are spaced from the first surface of said semiconductor chip by a gap ranging from 0.1 mm to 0.4 mm and the gap is filled with resin that is part of said resin package.
Claim 14
Independent Claim
201 words
A method of producing a semiconductor device comprising the steps of: preparing a semiconductor chip which has a first surface, a second surface opposite the first surface, and a plurality of electrode pads linearly disposed on a longitudinal center line of the first surface of said semiconductor chip; placing said semiconductor chip on a first lead frame having a die-pad smaller in area than said semiconductor chip; bonding said die-pad of the first lead frame and a second surface of said semiconductor chip; positioning a second lead frame, including at least one common inner-lead and a plurality of inner leads disposed adjacent to said common inner-lead, opposite and spaced from said first surface of said semiconductor chip to maintain a gap between the first surface of said semiconductor chip and said common inner-lead and said plurality of inner leads of 0.1 mm to 0.4 mm; wire-bonding each of said plurality of electrode pads of said semiconductor chip to one of the common inner-lead and a corresponding inner lead; and sealing said semiconductor chip, said die-pad, said common inner-lead, and said plurality of inner leads in a resin including between said first surface of said semiconductor chip and the second lead frame.
Claim 15
Independent Claim
201 words
A method of producing a semiconductor device comprising the steps of: preparing a semiconductor chip which has a first surface, a second surface opposite the first surface, and a plurality of electrode pads linearly disposed on a longitudinal center line of the first surface of said semiconductor chip; placing said semiconductor chip on a first lead frame having a die-pad smaller in area than said semiconductor chip; bonding said die-pad of the first lead frame and a second surface of said semiconductor chip; positioning a second lead frame, including at least one common inner-lead and a plurality of inner leads disposed adjacent to said common inner-lead, opposite and spaced from said first surface of said semiconductor chip to maintain a gap between the first surface of said semiconductor chip and said common inner-lead and said plurality of inner leads of 0.1 mm to 0.4 mm; wire-bonding each of said plurality of electrode pads of said semiconductor chip to one of the common inner-lead and a corresponding inner lead; and sealing said semiconductor chip, said die-pad, said common inner-lead, and said plurality of inner leads in a resin including between said first surface of said semiconductor chip and the second lead frame.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-08-01 | 1998-01-31 | 1998-08-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-08-01 | 2002-01-31 | 2002-08-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-08-01 | 2006-01-31 | 2006-08-02 | $7700.00 | Window Closed / Lapsed |