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US5699292A Expired / Lapsed US ⏱️ 0.0 years remaining

SRAM cell employing substantially vertically elongated pull-up resistors

Assignee: Micron Technology Inc
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Filing: 1996-08-29
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Granted: 1997-12-16
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Expires: 2016-08-29
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Abstract

Abstract An SRAM cell having at least four field effect transistors includes, a) at least four transistor gates, a ground line, a Vcc line, and a pair of pull-up resistors; the four transistor gates having associated transistor diffusion regions operatively adjacent thereto; and b) the Vcc line and the ground line being provided in different respective elevational planes, the pull-up resistors being substantially vertically elongated between Vcc and selected of the respective transistor diffusion regions operatively adjacent the gates. In an additional aspect, an SRAM cell having at least four field effect transistors includes, i) at least four transistor gates, an electrical interconnect line, a Vcc line, and a pair of pull-up resistors; the four transistor gates having associated transistor diffusion regions operatively adjacent thereto; and ii) the Vcc line and the electrical interconnect line being provided in different respective elevational planes, the pull-up resistors being substantially vertically elongated between Vcc and selected of the respective transistor diffusion regions operatively adjacent the gates.

Inventors

  • 👤 Ceredig Roberts

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 14:34
CPC Classifications
H; H10; H10B; H10B10/00; H10B10/15; Y; Y10; Y10S; Y10S257/00; Y10S257/903; Y10S257/904

Claims Analysis

Total Claims: 22
Claim 1
Independent Claim 95 words
An SRAM cell having at least four field effect transistors, the SRAM cell comprising: at least four transistor gates, a ground line, a Vcc line, and a pair of pull-up resistors; the four transistor gates having associated transistor diffusion regions operatively adjacent thereto; and the Vcc line and the ground line being provided in different respective elevational planes with the Vcc line being provided everywhere elevationally outward of the ground line throughout the cell, the pull-up resistors being substantially vertically elongated between Vcc and selected of the respective transistor diffusion regions operatively adjacent the gates.
Claim 2
Dependent Claim 95 words
An SRAM cell having at least four field effect transistors, the SRAM cell comprising: at least four transistor gates, a ground line, a Vcc line, and a pair of pull-up resistors; the four transistor gates having associated transistor diffusion regions operatively adjacent thereto; and the Vcc line and the ground line being provided in different respective elevational planes with the Vcc line being provided everywhere elevationally outward of the ground line throughout the cell, the pull-up resistors being substantially vertically elongated between Vcc and selected of the respective transistor diffusion regions operatively adjacent the gates.
Claim 3
Dependent Claim 16 words
The SRAM cell of claim 1 wherein the Vcc line and the ground line elevationally overlap.
Claim 4
Dependent Claim 29 words
The SRAM cell of claim 1 wherein the Vcc line and the ground line have a common substantial shape in elongation and substantially elevationally overlap everywhere throughout the cell.
Claim 5
Dependent Claim 117 words
An SRAM cell having at least four field effect transistors, the SRAM cell comprising: at least four transistor gates, a ground line, a Vcc line, and a pair of pull-up resistors; the four transistor gates having associated transistor diffusion regions operatively adjacent thereto; the Vcc line and the ground line being provided in different respective elevational planes, the pull-up resistors being substantially vertically elongated between Vcc and selected of the respective transistor diffusion regions operatively adjacent the gates; and the Vcc line having outer lateral edges in locations where it connects with the respective pull-up resistors, the substantially vertically elongated pull-up resistors being received substantially outward of the Vcc line outer lateral edges and ohmically connecting therewith.
Claim 6
Dependent Claim 117 words
An SRAM cell having at least four field effect transistors, the SRAM cell comprising: at least four transistor gates, a ground line, a Vcc line, and a pair of pull-up resistors; the four transistor gates having associated transistor diffusion regions operatively adjacent thereto; the Vcc line and the ground line being provided in different respective elevational planes, the pull-up resistors being substantially vertically elongated between Vcc and selected of the respective transistor diffusion regions operatively adjacent the gates; and the Vcc line having outer lateral edges in locations where it connects with the respective pull-up resistors, the substantially vertically elongated pull-up resistors being received substantially outward of the Vcc line outer lateral edges and ohmically connecting therewith.
Claim 7
Dependent Claim 14 words
The SRAM cell of claim 1 having only one Vcc line in the cell.
Claim 8
Dependent Claim 116 words
An SRAM cell having at least four field effect transistors, the SRAM cell comprising: at least four transistor gates, a ground line, a Vcc line, and a pair of pull-up resistors; the four transistor gates having associated transistor diffusion regions operatively adjacent thereto; the Vcc line and the ground line being provided in different respective elevational planes, the pull-up resistors being substantially vertically elongated between Vcc and selected of the respective transistor diffusion regions operatively adjacent the gates; and the Vcc line and the ground line having a common substantial shape in elongation and substantially elevationally overlapping throughout the cell, and the Vcc line being provided everywhere elevationally outward of the ground line throughout the cell.
Claim 9
Dependent Claim 116 words
An SRAM cell having at least four field effect transistors, the SRAM cell comprising: at least four transistor gates, a ground line, a Vcc line, and a pair of pull-up resistors; the four transistor gates having associated transistor diffusion regions operatively adjacent thereto; the Vcc line and the ground line being provided in different respective elevational planes, the pull-up resistors being substantially vertically elongated between Vcc and selected of the respective transistor diffusion regions operatively adjacent the gates; and the Vcc line and the ground line having a common substantial shape in elongation and substantially elevationally overlapping throughout the cell, and the Vcc line being provided everywhere elevationally outward of the ground line throughout the cell.
Claim 10
Dependent Claim 165 words
An SRAM cell having at least four field effect transistors, the SRAM cell comprising: at least four transistor gates, a ground line, a Vcc line, and a pair of pull-up resistors; the four transistor gates having associated transistor diffusion regions operatively adjacent thereto; the Vcc line and the ground line being provided in different respective elevational planes, the pull-up resistors being substantially vertically elongated between Vcc and selected of the respective transistor diffusion regions operatively adjacent the gates; and only one Vcc line being in the cell, the Vcc line and the ground line having a common substantial shape in elongation and substantially elevationally overlapping throughout the cell, the one Vcc line being provided everywhere elevationally outward of the ground line throughout the cell, and the one Vcc line having outer lateral edges in locations where it connects with the respective pull-up resistors, the substantially vertically elongated pull-up resistors being received substantially outward of the one Vcc line outer lateral edges and ohmically connecting therewith.
Claim 11
Dependent Claim 165 words
An SRAM cell having at least four field effect transistors, the SRAM cell comprising: at least four transistor gates, a ground line, a Vcc line, and a pair of pull-up resistors; the four transistor gates having associated transistor diffusion regions operatively adjacent thereto; the Vcc line and the ground line being provided in different respective elevational planes, the pull-up resistors being substantially vertically elongated between Vcc and selected of the respective transistor diffusion regions operatively adjacent the gates; and only one Vcc line being in the cell, the Vcc line and the ground line having a common substantial shape in elongation and substantially elevationally overlapping throughout the cell, the one Vcc line being provided everywhere elevationally outward of the ground line throughout the cell, and the one Vcc line having outer lateral edges in locations where it connects with the respective pull-up resistors, the substantially vertically elongated pull-up resistors being received substantially outward of the one Vcc line outer lateral edges and ohmically connecting therewith.
Claim 12
Dependent Claim 79 words
An SRAM cell having at least four field effect transistors, the SRAM cell comprising: at least four transistor gates, a ground line, a Vcc line, and a pair of pull-up resistors; the four transistor gates having associated transistor diffusion regions operatively adjacent thereto; and the Vcc line and the ground line being provided in different respective elevational planes, the pull-up resistors being substantially vertically elongated between Vcc and selected of the respective transistor diffusion regions operatively adjacent the gates.
Claim 13
Dependent Claim 79 words
An SRAM cell having at least four field effect transistors, the SRAM cell comprising: at least four transistor gates, a ground line, a Vcc line, and a pair of pull-up resistors; the four transistor gates having associated transistor diffusion regions operatively adjacent thereto; and the Vcc line and the ground line being provided in different respective elevational planes, the pull-up resistors being substantially vertically elongated between Vcc and selected of the respective transistor diffusion regions operatively adjacent the gates.
Claim 14
Dependent Claim 16 words
The SRAM cell of claim 8 wherein the Vcc line and the ground line elevationally overlap.
Claim 15
Dependent Claim 28 words
The SRAM cell of claim 8 wherein the Vcc line and the ground line have a common substantial shape in elongation and substantially elevationally overlap throughout the cell.
Claim 16
Dependent Claim 14 words
The SRAM cell of claim 8 having only one Vcc line in the cell.
Claim 17
Dependent Claim 93 words
An SRAM cell having at least four field effect transistors, the SRAM cell comprising: at least four transistor gates, a ground line, a Vcc line, and a pair of pull-up resistors; the four transistor gates having associated transistor diffusion regions operatively adjacent thereto; and the Vcc line and the ground line being provided in different respective elevational planes, the pull-up resistors being substantially vertically elongated between Vcc and selected of the respective transistor diffusion regions operatively adjacent the gates, the pull-up resistors being directly over the selected of the respective transistor diffusion regions.
Claim 18
Dependent Claim 93 words
An SRAM cell having at least four field effect transistors, the SRAM cell comprising: at least four transistor gates, a ground line, a Vcc line, and a pair of pull-up resistors; the four transistor gates having associated transistor diffusion regions operatively adjacent thereto; and the Vcc line and the ground line being provided in different respective elevational planes, the pull-up resistors being substantially vertically elongated between Vcc and selected of the respective transistor diffusion regions operatively adjacent the gates, the pull-up resistors being directly over the selected of the respective transistor diffusion regions.
Claim 19
Dependent Claim 103 words
An SRAM cell having at least four field effect transistors, the SRAM cell comprising: at least four transistor gates, a ground line, a Vcc line, and a pair of pull-up resistors; the four transistor gates having associated transistor diffusion regions operatively adjacent thereto; and the Vcc line and the ground line being provided in different respective elevational planes, the pull-up resistors being substantially vertically elongated between Vcc and selected of the respective transistor diffusion regions operatively adjacent the gates, the pull-up resistors extending within an opening in an insulative layer, and the pull-up resistors not completely filling the opening in the insulative layer.
Claim 20
Dependent Claim 103 words
An SRAM cell having at least four field effect transistors, the SRAM cell comprising: at least four transistor gates, a ground line, a Vcc line, and a pair of pull-up resistors; the four transistor gates having associated transistor diffusion regions operatively adjacent thereto; and the Vcc line and the ground line being provided in different respective elevational planes, the pull-up resistors being substantially vertically elongated between Vcc and selected of the respective transistor diffusion regions operatively adjacent the gates, the pull-up resistors extending within an opening in an insulative layer, and the pull-up resistors not completely filling the opening in the insulative layer.
Claim 21
Dependent Claim 97 words
An SRAM cell having at least four field effect transistors, the SRAM cell comprising: at least four transistor gates, a ground line, a Vcc line, and a pair of pull-up resistors; the four transistor gates having associated transistor diffusion regions operatively adjacent thereto; and the Vcc line and the ground line being provided in different respective elevational planes, the pull-up resistors being substantially vertically elongated between Vcc and selected of the respective transistor diffusion regions operatively adjacent the gates, the pull-up resistors extending within an opening in an insulative layer, the pull-up resistors comprising back-to-back diode constructions.
Claim 22
Dependent Claim 97 words
An SRAM cell having at least four field effect transistors, the SRAM cell comprising: at least four transistor gates, a ground line, a Vcc line, and a pair of pull-up resistors; the four transistor gates having associated transistor diffusion regions operatively adjacent thereto; and the Vcc line and the ground line being provided in different respective elevational planes, the pull-up resistors being substantially vertically elongated between Vcc and selected of the respective transistor diffusion regions operatively adjacent the gates, the pull-up resistors extending within an opening in an insulative layer, the pull-up resistors comprising back-to-back diode constructions.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2000-12-15 2001-06-16 2001-12-16 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2004-12-15 2005-06-16 2005-12-16 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2008-12-15 2009-06-16 2009-12-16 $7700.00 Window Closed / Lapsed

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