Patent US5675310A successfully refreshed from Google Patents.
US5675310A
Expired / Lapsed
US
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Thin film resistors on organic surfaces
Assignee: General Electric Co
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Filing: 1994-12-05
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Granted: 1997-10-07
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Expires: 2014-12-05
Abstract
Abstract A method for fabricating a thin film resistor comprises applying a tantalum nitride layer over a dielectric layer, applying a metallization layer over the tantalum nitride layer, and patterning the metallization layer with a first portion of the metallization layer situated apart from a second portion of the metallization layer and both the first and second portions being at least partially situated on the tantalum nitride layer. In one embodiment, after patterning the metallization layer, the resistance value between the first and second portions of the metallization layer is determined and compared to a predetermined resistance value, and at least one of the first and second portions is trimmed to obtain a modified resistance value between the first and second portions that is closer to the predetermined resistance value than the determined resistance value.
Inventors
- 👤 Robert John Wojnarowski
- 👤 James Wilson Rose
- 👤 Kyung Wook Paik
- 👤 Michael Gdula
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 11:06
CPC Classifications
H; H05; H05K; H05K1/00; H05K1/16; H05K1/167; H01; H01C; H01C1/00; H01C1/02; H01C1/032; H01C17/00; H01C17/06; H01C17/075; H01C7/00; H01C7/006; H05K1/02; H05K1/0266; H05K1/0268; H05K2201/00; H05K2201/03; H05K2201/0302; H05K2201/0317; H05K2203/00; H05K2203/03; H05K2203/0361; H05K2203/17; H05K2203/171; H05K3/00; H05K3/38; H05K3/388; H10; H10W; H10W70/00; H10W70/099; H10W70/60; H10W70/611; H10W70/614; H10W74/00; H10W74/10; H10W74/15; Y; Y10; Y10S; Y10S148/00; Y10S148/136; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49082; Y10T29/49101
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
111 words
A thin film resistor, comprising: an organic dielectric layer; a tantalum nitride layer deposited over the dielectric layer; a patterned metallization layer over the tantalum nitride layer, a first portion of the metallization layer situated apart from a second portion of the metallization layer with both the first and second portions being at least partially situated on the tantalum nitride layer; wherein the dielectric layer is situated over a substrate having a chip well with a circuit chip having chip pads situated in the chip well, the dielectric layer having vias to the chip pads, and the tantalum nitride layer and the metallization layer extend into selected ones of the vias.
Claim 2
Dependent Claim
111 words
A thin film resistor, comprising: an organic dielectric layer; a tantalum nitride layer deposited over the dielectric layer; a patterned metallization layer over the tantalum nitride layer, a first portion of the metallization layer situated apart from a second portion of the metallization layer with both the first and second portions being at least partially situated on the tantalum nitride layer; wherein the dielectric layer is situated over a substrate having a chip well with a circuit chip having chip pads situated in the chip well, the dielectric layer having vias to the chip pads, and the tantalum nitride layer and the metallization layer extend into selected ones of the vias.
Claim 3
Dependent Claim
18 words
The thin film resistor of claim 1, wherein the tantalum nitride layer comprises a hexagonal closed packed structure.
Claim 4
Dependent Claim
14 words
The thin film resistor of claim 2, wherein the dielectric layer comprises a polyimide.
Claim 5
Dependent Claim
13 words
The thin film resistor of claim 3, wherein the polyimide includes filler material.
Claim 6
Dependent Claim
22 words
The thin film resistor of claim 4, wherein the filler material is one selected from the group consisting of stone and mineral.
Claim 7
Dependent Claim
78 words
The thin film resistor of claim 1, further including: an additional dielectric layer over the metallization layer; an additional tantalum nitride layer over the additional dielectric layer; a patterned additional metallization layer (over the additional tantalum nitride layer, a first additional portion of the additional metallization layer situated apart from a second additional portion of the additional metallization layer with both the first and second additional portions being at least partially situated on the additional tantalum nitride layer.
Claim 8
Independent Claim
120 words
A method for fabricating a thin film resistor, comprising the steps of: applying a dielectric layer over a substrate having a chip well with an integrated circuit chip having chip pads situated in the chip well; forming vias through the dielectric layer to the chip pads; applying a tantalum nitride layer over an organic dielectric layer and in selected ones of the vias; depositing a metallization layer over the tantalum nitride layer and in the selected ones of the vias; and patterning the metallization layer with a first portion of the metallization layer situated apart from a second portion of the metallization layer and both the first and second portions being at least partially situated on the tantalum nitride layer.
Claim 9
Independent Claim
120 words
A method for fabricating a thin film resistor, comprising the steps of: applying a dielectric layer over a substrate having a chip well with an integrated circuit chip having chip pads situated in the chip well; forming vias through the dielectric layer to the chip pads; applying a tantalum nitride layer over an organic dielectric layer and in selected ones of the vias; depositing a metallization layer over the tantalum nitride layer and in the selected ones of the vias; and patterning the metallization layer with a first portion of the metallization layer situated apart from a second portion of the metallization layer and both the first and second portions being at least partially situated on the tantalum nitride layer.
Claim 10
Dependent Claim
122 words
A circuit module, comprising: a substrate having a chip well with a circuit chip having chip pads situated in the chip well; an organic dielectric layer over the substrate and circuit chip, the dielectric layer having vias to the chip pads; a tantalum nitride layer over the dielectric layer, the tantalum nitride layer comprising a hexagonal closed packed structure and extending into selected ones of the vias; and a patterned metallization layer over the tantalum nitride layer, a first portion of the metallization layer situated apart from a second portion of the metallization layer with both the first and second portions being at least partially situated on the tantalum nitride layer, the metallization layer extending into the selected ones of the vias.
Claim 11
Dependent Claim
122 words
A circuit module, comprising: a substrate having a chip well with a circuit chip having chip pads situated in the chip well; an organic dielectric layer over the substrate and circuit chip, the dielectric layer having vias to the chip pads; a tantalum nitride layer over the dielectric layer, the tantalum nitride layer comprising a hexagonal closed packed structure and extending into selected ones of the vias; and a patterned metallization layer over the tantalum nitride layer, a first portion of the metallization layer situated apart from a second portion of the metallization layer with both the first and second portions being at least partially situated on the tantalum nitride layer, the metallization layer extending into the selected ones of the vias.
Claim 12
Dependent Claim
107 words
The circuit module of claim 8, further including an additional dielectric layer over the metallization layer; an additional tantalum nitride layer over the additional dielectric layer, the additional tantalum nitride layer and the additional dielectric layer having at least one additional via extending to the metallization layer; a patterned additional metallization layer over the additional tantalum nitride layer and extending into the at least one additional via, a first additional portion of the additional metallization layer situated apart from a second additional portion of the additional metallization layer with both the first and second additional portions being at least partially situated on the additional tantalum nitride layer.
References Cited (Backward Citations)
US3781610A
Cited
US4042479A
Cited
US3918019A
Cited
US4020222A
Cited
US4087778A
Cited
US4200970A
Cited
US4267634A
Cited
US4418474A
Cited
US4734709A
Cited
US4780790A
Cited
US4801469A
Cited
US4783695A
Cited
US5043295A
Cited
US5084420A
Cited
US5266529A
Cited
US5469131A
Cited
US5323138A
Cited
US5353498A
Cited
US5468672A
Cited
US5586006A
Cited
US5420063A
Cited
US5496762A
Cited
US5602059A
Cited
US5547896A
Cited
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