Methods for interconnecting integrated circuits

Claim 1

A method of forming a multi-level electrical assembly for coupling at least one integrated circuit having a plurality of electrically conductive leads to receptacles of at least one attachment area of a circuit board, comprising: (a) forming at least one interconnect board of an electrically insulating substrate having electrically conductive portions, including electrically conductive pads on a surface of the board, flat electrically conductive contacts on a bottom surface of the interconnect board, and electrically conductive pathways between selected pads and selected contacts; (b) placing a plurality of electrically conductive pins through an electrically insulating pin carrier comprised of a plastic with thermal expansion characteristics similar to that of the substrate of the interconnect board; (c) attaching ends of the pins to the contacts on the bottom surface of the interconnect board without causing any portion of the pins to pass through the flat bottom surface of the interconnect board, by using a solder material that has a reflow temperature at least as high as 185° C.; and (d) soldering an integrated circuit to the electrically conductive pads of the interconnect board at a temperature less than the reflow temperature of the solder material specified in part (c).

Claim 2

A method of forming a multi-level electrical assembly for coupling at least one integrated circuit having a plurality of electrically conductive leads to receptacles of at least one attachment area of a circuit board, comprising: (a) forming at least one interconnect board of an electrically insulating substrate having electrically conductive portions, including electrically conductive pads on a surface of the board, flat electrically conductive contacts on a bottom surface of the interconnect board, and electrically conductive pathways between selected pads and selected contacts; (b) placing a plurality of electrically conductive pins through an electrically insulating pin carrier comprised of a plastic with thermal expansion characteristics similar to that of the substrate of the interconnect board; (c) attaching ends of the pins to the contacts on the bottom surface of the interconnect board without causing any portion of the pins to pass through the flat bottom surface of the interconnect board, by using a solder material that has a reflow temperature at least as high as 185° C.; and (d) soldering an integrated circuit to the electrically conductive pads of the interconnect board at a temperature less than the reflow temperature of the solder material specified in part (c).

Claim 7

A method of forming a multi-level electrical assembly for coupling at least one integrated circuit having a plurality of electrically conductive leads to receptacles of at least one attachment area of a circuit board, comprising: (a) forming at least one interconnect board of an electrically insulating substrate having electrically conductive portions, including electrically conductive pads on a surface of the board, flat electrically conductive contacts on a bottom surface of the interconnect board, and electrically conductive pathways between selected pads and selected contacts by a process comprising: (i) forming first and second circuit patterns on two sides of an intermediate core member; (ii) after (i), sandwiching the intermediate core member between a pair of outside core members; (iii) after (ii), drilling via holes through the sandwiched members and plating the inside of the holes with a conductive material; and (iv) forming third and fourth circuit patterns, each on an outside side of one of the pair of outside core members; (f) placing a plurality of electrically conductive pins through an electrically insulating pin carrier comprised of a plastic with thermal expansion characteristics similar to that of the substrate of the interconnect board; and (c) attaching ends of the pins to the contacts on the bottom surface of the interconnect board without causing any portion of the pins to pass through the flat bottom surface of the interconnect board.

Claim 8

A method of forming a multi-level electrical assembly for coupling at least one integrated circuit having a plurality of electrically conductive leads to receptacles of at least one attachment area of a circuit board, comprising: (a) forming at least one interconnect board of an electrically insulating substrate having electrically conductive portions, including electrically conductive pads on a surface of the board, flat electrically conductive contacts on a bottom surface of the interconnect board, and electrically conductive pathways between selected pads and selected contacts by a process comprising: (i) forming first and second circuit patterns on two sides of an intermediate core member; (ii) after (i), sandwiching the intermediate core member between a pair of outside core members; (iii) after (ii), drilling via holes through the sandwiched members and plating the inside of the holes with a conductive material; and (iv) forming third and fourth circuit patterns, each on an outside side of one of the pair of outside core members; (f) placing a plurality of electrically conductive pins through an electrically insulating pin carrier comprised of a plastic with thermal expansion characteristics similar to that of the substrate of the interconnect board; and (c) attaching ends of the pins to the contacts on the bottom surface of the interconnect board without causing any portion of the pins to pass through the flat bottom surface of the interconnect board.

Claim 16

A method of forming a multi-level electrical assembly for coupling at least one integrated circuit having a plurality of electrically conductive leads to receptacles of at least one attachment area of a circuit board, comprising: (a) placing a plurality of electrically conductive pins through an electrically insulating pin carrier comprised of a plastic and including a plurality of plastic locator posts, wherein each pin is placed at a measured position relative to the locator posts; (b) forming at least one interconnect board of an electrically insulating substrate having electrically conductive portions and thermal expansion characteristics similar to that of the plastic pin carrier, by a process comprising: (i) drilling holes in the board aligned with the locator posts; (ii) forming electrically conductive pads on a surface of the board; (iii) forming flat electrically conductive contacts on a bottom surface of the board, each contact placed at a measured position relative to the aligned holes; and (iv) forming electrically conductive pathways between selected pads and selected contacts; (c) attaching ends of the pins to the contacts on the bottom surface of the interconnect board without causing any portion of the pins to pass through the flat bottom surface of the interconnect board; and (d) after the pins are attached to the board, moving the pin carrier along the pins until the locator posts are inserted into the aligned holes and the pin carrier is positioned in contact with the interconnect board and then fastening the pin carrier and the interconnect board together.

Claim 17

A method of forming a multi-level electrical assembly for coupling at least one integrated circuit having a plurality of electrically conductive leads to receptacles of at least one attachment area of a circuit board, comprising: (a) placing a plurality of electrically conductive pins through an electrically insulating pin carrier comprised of a plastic and including a plurality of plastic locator posts, wherein each pin is placed at a measured position relative to the locator posts; (b) forming at least one interconnect board of an electrically insulating substrate having electrically conductive portions and thermal expansion characteristics similar to that of the plastic pin carrier, by a process comprising: (i) drilling holes in the board aligned with the locator posts; (ii) forming electrically conductive pads on a surface of the board; (iii) forming flat electrically conductive contacts on a bottom surface of the board, each contact placed at a measured position relative to the aligned holes; and (iv) forming electrically conductive pathways between selected pads and selected contacts; (c) attaching ends of the pins to the contacts on the bottom surface of the interconnect board without causing any portion of the pins to pass through the flat bottom surface of the interconnect board; and (d) after the pins are attached to the board, moving the pin carrier along the pins until the locator posts are inserted into the aligned holes and the pin carrier is positioned in contact with the interconnect board and then fastening the pin carrier and the interconnect board together.