US5126818A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor device
Assignee: Panasonic Electric Works Co Ltd
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Filing: 1990-04-02
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Granted: 1992-06-30
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Expires: 2010-04-02
Abstract
Abstract A semiconductor device includes a circuit pattern of a conductive thin film formed on a ceramic substrate by means of an etching, and an IC chip connected to the etched circuit pattern through a gang-bonding in which respective pads of conduction parts of the circuit pattern and of the IC chip directly contact with each other. The circuit pattern can be thereby provided densely, and contributive to a higher integration of the IC chip.
Inventors
- 👤 Shigenari Takami
- 👤 Tatsuhiko Irie
- 👤 Jiro Hashizume
- 👤 Yoshimasa Himura
- 👤 Mitsuhiro Kani
- 👤 Nobolu Yamaguchi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 10:35
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/01; H10W70/05; H10W70/60; H05; H05K; H05K1/00; H05K1/02; H05K1/03; H05K1/0306; H05K3/00; H05K3/0097; H05K3/02; H05K3/06; H10W72/00; H10W72/071; H10W72/072; H10W72/07231; H10W72/07236; H10W90/00; H10W90/701; H10W90/721; H10W90/724; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49124; Y10T29/4913; Y10T29/49144
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
230 words
A semiconductor device comprising a ceramic substrate on a surface of which is disposed a plurality of conduction parts formed of an etched film, said conduction parts having side surfaces which are substantially perpendicular to said surface of said substrate, a plurality of lead pins projecting from said substrate and connected to said conduction parts for forming input and output terminals, and an IC chip mounted on said surface of said substrate and electrically contacting said conduction parts by a plurality of contacting bumps to minimize the required spacing between adjacent conduction parts, said contacting bumps being provided on said conduction parts, said side surfaces of each of said conduction parts defining a width at a region thereof where a respective one of said contacting bumps is located, each of said bumps being no wider than said width, said contacting bumps being provided on said conduction parts, the conduction parts forming a dense pattern on the substrate, the side surfaces of adjacent conduction parts being spaced apart by a distance which is no greater than the width between the side surfaces of one of the adjacent conduction parts, the conduction parts having uppermost surfaces spaced from the substrate by a uniform height and the contacting bumps comprising electroplated conductive material having uppermost surfaces which simultaneously contact pads on the IC chip when the IC chip is mounted on the substrate.
Claim 2
Dependent Claim
230 words
A semiconductor device comprising a ceramic substrate on a surface of which is disposed a plurality of conduction parts formed of an etched film, said conduction parts having side surfaces which are substantially perpendicular to said surface of said substrate, a plurality of lead pins projecting from said substrate and connected to said conduction parts for forming input and output terminals, and an IC chip mounted on said surface of said substrate and electrically contacting said conduction parts by a plurality of contacting bumps to minimize the required spacing between adjacent conduction parts, said contacting bumps being provided on said conduction parts, said side surfaces of each of said conduction parts defining a width at a region thereof where a respective one of said contacting bumps is located, each of said bumps being no wider than said width, said contacting bumps being provided on said conduction parts, the conduction parts forming a dense pattern on the substrate, the side surfaces of adjacent conduction parts being spaced apart by a distance which is no greater than the width between the side surfaces of one of the adjacent conduction parts, the conduction parts having uppermost surfaces spaced from the substrate by a uniform height and the contacting bumps comprising electroplated conductive material having uppermost surfaces which simultaneously contact pads on the IC chip when the IC chip is mounted on the substrate.
Claim 3
Dependent Claim
22 words
A semiconductor device according to claim 1, wherein said contacting bumps are provided on flat polished surface portions of said conduction parts.
Claim 4
Dependent Claim
73 words
A semiconductor device according to claim 1, wherein said conduction parts form a circuit pattern which defines a mounting space for said IC chip, said circuit pattern being provided with a pair of positioning bumps for positioning the IC chip, the positioning bumps being located at symmetrical positions across said mounting space and disposed outside of the IC chip, said positioning bumps being provided on said circuit pattern simultaneously with said contacting bumps.
Claim 5
Dependent Claim
36 words
A semiconductor device according to claim 1, wherein said ceramic substrate includes steps formed a long side edges thereof with the outermost end portions of said conduction parts located inwardly from outermost edges of said steps.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-06-30 | 1995-12-30 | 1996-06-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-06-30 | 1999-12-30 | 2000-06-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-06-30 | 2003-12-30 | 2004-06-30 | $7700.00 | Window Closed / Lapsed |