Process for manufacturing plastic pin grid arrays and the product produced thereby

Claim 2

A process for forming an integrated circuit pin grid array package, comprising the steps of: providing an interconnect tape having first and second opposing surfaces, said first surface having a metal circuit pattern defining a plurality of leads; forming a plurality of holes of a first diameter in said metal circuit pattern; providing a plurality of pins, said pins defined by a pin head end of a second diameter, an insertion end and a collar of a third diameter disposed therebetween, said collar defined by first and second shoulder wherein said third diameter is larger than said first diameter and said first diameter is larger than said second diameter; inserting said insertion end of said pin into a first fixture; placing said interconnect tape over said pin head end such that said holes in said circuit pattern encircle said pin heads and said interconnect tape rests on said first shoulder of said pins; and soldering said pins to said interconnect tape using a mask to control said solder.

Claim 3

The process of claim 1 including the additional steps of providing said mask with first and second opposing sides and a plurality of holes of a fourth diameter, said fourth diameter larger than said first diameter and smaller than said third diameter, placing said mask over said pin heads so said first side of said mask rests on said first shoulder of said pins with said interconnect tape disposed therebetween, applying said solder as a solder paste to said second side of said mask, and distributing said solder paste across the second side of said mask so said solder paste is deposited within the holes of said mask.

Claim 4

The process of claim 2 providing the length of said pin head is greater than the thickness of said interconnect tape and said mask combined.

Claim 5

The process of claim 3 further providing the length of said pin head is at least .010 inches greater than the thickness of said interconnect tape and said mask combined.

Claim 6

The process of claim 4 further providing the length of said pin head is from about .010 inch to about .020 inch greater than the thickness of said interconnect tape and said mask combined.

Claim 7

The process of claim 5 including coating said pin head and said first shoulder with a second metal or metal alloy to increase solder wetting.

Claim 8

The process of claim 2 including the step of forming said solder paste as a mixture of a low melting temperature metal alloy powder and a liquid vehicle.

Claim 9

The process of claim 7 including selecting said metal alloy powder to be either tin/lead or tin/silver and said liquid vehicle to be a rosin based flux.

Claim 10

The process of claim 8 further providing said rosin based flux occupies from about 5 volume percent to about 35 volume percent of said solder paste,

Claim 11

The process of claim 9 providing said first surface of said interconnect tape is in contact with said first shoulder of said pin.

Claim 12

The process of claim 9 providing said second surface of said interconnect tape is in contact with said first shoulder of said pin.

Claim 13

The process of claim 2 including the additional step of encapsulating in a single step, a portion of said interconnect tape including the edges thereof, a portion of said heat sink and said soldered pins except for said insertion end and said second shoulder within a polymer resin.

Claim 14

The process of claim 12 including selecting said polymer resin to be either thermosetting or thermoplastic with a molding temperature less than the melting temperature of said solder.

Claim 15

The process of claim 13 wherein said solder paste is a mixture of a metal alloy having a melting temperature of from about 150° C. to about 400° C. and a liquid vehicle.

Claim 16

The process of claim 14 wherein said metal alloy is either tin/lead or tin silver and said liquid vehicle is a rosin based flux.

Claim 17

The process of claim 14 including providing a notch within the collar of said pin to mechanically lick said pin within said polymer resin.

Claim 18

The process of claim 1, wherein said second surface of said interconnect tape defines a second metal circuit pattern and is separated from said first surface by a dielectric layer.

Claim 19

A process for forming a substantially non-encapsulated integrated circuit pin grid array package, comprising the steps of: providing a flexible interconnect tape having first and second opposing surfaces, said first surface having a metal circuit pattern defining a plurality of leads; forming a plurality of holes in said metal circuit pattern; providing a plurality of pins, said pins defined by a pin head end and insertion end; soldering said interconnect tape to said pins; providing a cup shaped heat sink, said heat sink being comprised of a collar component and a base component, said base component defining a cavity and having an interior surface for supporting an integrated circuit and an exterior surface; and attaching said heat sink to said second surface of said interconnect tape opposite said leads.

Claim 20

A process for forming a substantially non-encapsulated integrated circuit pin grid array package, comprising the steps of: providing a flexible interconnect tape having first and second opposing surfaces, said first surface having a metal circuit pattern defining a plurality of leads; forming a plurality of holes in said metal circuit pattern; providing a plurality of pins, said pins defined by a pin head end and insertion end; soldering said interconnect tape to said pins; providing a cup shaped heat sink, said heat sink being comprised of a collar component and a base component, said base component defining a cavity and having an interior surface for supporting an integrated circuit and an exterior surface; and attaching said heat sink to said second surface of said interconnect tape opposite said leads.

Claim 21

The process of claim 18 including coating said heat sink with a second metal to improve solderability and corrosion resistance.

Claim 22

The process of claim 19 including bonding said collar of said heat sink to said second surface of said interconnect tape.

Claim 23

The process of claim 20 including bonding said collar with a thermoplastic or thermosetting polymer adhesive.

Claim 24

The process of claim 21 providing said adhesive is an epoxy.

Claim 25

The process of claim 20 including said second surface of said interconnect tape defines a metal seal ring and disposing a solder preform between said heat sink collar and said seal ring.

Claim 26

The process of claim 23 including soldering said heat sink to said interconnect tape.

Claim 27

The process of claim 18, wherein said second surface of said interconnect tape defines a second metal circuit pattern and is separated from said first surface by a dielectric layer.

Claim 28

A process for forming an integrated circuit pin grid array package, comprising the steps of: providing an interconnect tape having first and second opposing surfaces, said first surface having a metal circuit pattern defining a plurality of leads; forming a plurality of holes in said metal circuit pattern; providing a plurality of pins, said pins defined by a pin head end and a insertion end with a collar disposed therebetween, said collar defined by a first and second shoulder; electrically connecting said pins to said metal interconnect pattern; providing a heat sink, said heat sink being comprised of a collar component and a base component defining a cavity, said base component having an interior surface for supporting said integrated circuit and an exterior surface; attaching said heat sink to said second surface of said interconnect tape opposite said leads; encapsulating in a single step, at least a portion of said interconnect tape including the edges thereof, a portion of said heat sink and said pins except for said insertion end and said second shoulder within a polymer resin; and heating said polymer resin within a mold to form a plastic pin grid array package.

Claim 29

A process for forming an integrated circuit pin grid array package, comprising the steps of: providing an interconnect tape having first and second opposing surfaces, said first surface having a metal circuit pattern defining a plurality of leads; forming a plurality of holes in said metal circuit pattern; providing a plurality of pins, said pins defined by a pin head end and a insertion end with a collar disposed therebetween, said collar defined by a first and second shoulder; electrically connecting said pins to said metal interconnect pattern; providing a heat sink, said heat sink being comprised of a collar component and a base component defining a cavity, said base component having an interior surface for supporting said integrated circuit and an exterior surface; attaching said heat sink to said second surface of said interconnect tape opposite said leads; encapsulating in a single step, at least a portion of said interconnect tape including the edges thereof, a portion of said heat sink and said pins except for said insertion end and said second shoulder within a polymer resin; and heating said polymer resin within a mold to form a plastic pin grid array package.

Claim 30

The process of claim 26 including selecting said polymer resin to either thermosetting or thermoplastic with a molding temperature greater than about 220° C.

Claim 31

The process of claim 27 including selecting said polymer resin to have a molding temperature of from about 220° C. to about 400° C.

Claim 32

The process of claim 28 including providing a notch within the collar of said pin to mechanically lock said pin within said polymer resin.

Claim 33

The process of claim 29 including the step of attaching said integrated circuit to said interior surface of said heat sink and electrically connecting said integrated circuit to said leads prior to encapsulation.

Claim 34

The process of claim 30 including coating said electrically connected integrated circuit and said cavity of said heat sink with a compliant polymer prior to encapsulation

Claim 35

The process of claim 31 providing said interconnect tape, said heat sink and said pins except for said insertion end of said pins are encapsulated within said polymer resin.

Claim 36

The process of claim 28 providing said interconnect tape except for said leads, said heat sink except for said cavity, said exterior base and said interior base, and said insertion end of said pins are encapsulated within said polymer resin.

Claim 37

The process of claim 33 further providing a lid component and attaching said lid component to said molder polymer resin subsequent to attaching said integrated circuit device to said interior surface of said heat sink and electrically connecting said integrated circuit to said leads thereby sealing said integrated circuit within said heatsink cavity.

Claim 38

The process of claim 26, wherein said second surface of said interconnect tape defines a second metal circuit patterns and is separated from said first surface by a dielectric layer.