← Back to Patent Explorer
US5523240A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of manufacturing a thin film transistor with a halogen doped blocking layer

Assignee: Semiconductor Energy Laboratory Co Ltd
•
Filing: 1994-03-28
•
Granted: 1996-06-04
•
Expires: 2014-03-28
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A gate-insulated thin film transistor is disclosed. One improvement is that the thin film transistor is formed on a substrate through a blocking layer in between so that it is possible to prevent the transistor from being contaminated with impurities such as alkali ions which exist in the substrate. Also, a halogen is added to either or both of the blocking layer and a gate insulator of the transistor in order that impurities such as alkaline ions, dangling bonds and the like can be neutralized, therefore, the reliability of the device is improved.

Inventors

  • 👤 Hongyong Zhang
  • 👤 Shunpei Yamazaki

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-05 22:59
CPC Classifications
H; H10; H10D; H10D86/00; H10D86/40; H10D30/00; H10D30/01; H10D30/021; H10D30/031; H10D30/0312; H10D30/0314; H10D30/0321; H10D30/60; H10D30/67; H10D30/6729; H10D30/6737; H10D30/6739; H10D86/60; Y; Y10; Y10S; Y10S148/00; Y10S148/118

Claims Analysis

Total Claims: 18
Claim 1
Independent Claim 54 words
A method for manufacturing an insulated gate field effect transistor comprising the steps of: forming an impurity blocking layer on an insulating substrate; forming a non-single crystalline semiconductor layer to become source, drain and channel regions; forming a gate insulating layer on said non-single semiconductor layer, wherein said blocking layer contains a halogen element.
Claim 2
Independent Claim 54 words
A method for manufacturing an insulated gate field effect transistor comprising the steps of: forming an impurity blocking layer on an insulating substrate; forming a non-single crystalline semiconductor layer to become source, drain and channel regions; forming a gate insulating layer on said non-single semiconductor layer, wherein said blocking layer contains a halogen element.
Claim 3
Dependent Claim 14 words
The method of claim 1 wherein said gate insulating layer contains a halogen element.
Claim 4
Dependent Claim 12 words
The method of claim 1 wherein said blocking film comprises silicon oxide.
Claim 5
Independent Claim 64 words
A method for forming an insulated gate field effect transistor comprising the steps of: forming a protective film on a substrate; forming a channel semiconductor layer comprising non-single crystalline semiconductor on said protective film; and forming a gate insulating layer comprising silicon oxide adjacent to said channel semiconductor layer, wherein both of said gate insulating layer and said protective film contain a halogen element.
Claim 6
Independent Claim 64 words
A method for forming an insulated gate field effect transistor comprising the steps of: forming a protective film on a substrate; forming a channel semiconductor layer comprising non-single crystalline semiconductor on said protective film; and forming a gate insulating layer comprising silicon oxide adjacent to said channel semiconductor layer, wherein both of said gate insulating layer and said protective film contain a halogen element.
Claim 7
Independent Claim 73 words
A method for forming an insulated gate field effect transistor comprising the steps of: forming a protective film on a substrate; forming a channel semiconductor layer comprising non-single crystalline semiconductor on said protective film; and forming a gate insulating layer comprising silicon oxide by sputtering a synthetic quartz in an oxidizing atmosphere adjacent to said channel semiconductor layer, wherein both of said gate insulating layer and said protective film contain a halogen element.
Claim 8
Independent Claim 73 words
A method for forming an insulated gate field effect transistor comprising the steps of: forming a protective film on a substrate; forming a channel semiconductor layer comprising non-single crystalline semiconductor on said protective film; and forming a gate insulating layer comprising silicon oxide by sputtering a synthetic quartz in an oxidizing atmosphere adjacent to said channel semiconductor layer, wherein both of said gate insulating layer and said protective film contain a halogen element.
Claim 9
Independent Claim 61 words
A method for forming an insulated gate field effect transistor comprising: forming a protective film on a substrate; forming a channel semiconductor layer comprising non-single crystalline semiconductor on said protective film; forming a gate insulating layer comprising silicon oxide on said semiconductor layer; and annealing said gate insulating layer with a laser light, wherein said protective film contains a halogen element.
Claim 10
Independent Claim 61 words
A method for forming an insulated gate field effect transistor comprising: forming a protective film on a substrate; forming a channel semiconductor layer comprising non-single crystalline semiconductor on said protective film; forming a gate insulating layer comprising silicon oxide on said semiconductor layer; and annealing said gate insulating layer with a laser light, wherein said protective film contains a halogen element.
Claim 11
Dependent Claim 14 words
The method of claim 6 wherein said laser light is an excimer laser light.
Claim 12
Independent Claim 15 words
The method of claims 4, 5, 6, or 1 wherein said halogen element is chlorine.
Claim 13
Independent Claim 15 words
The method of claims 4, 5, 6 or 1 wherein said halogen element is fluorine.
Claim 14
Independent Claim 16 words
The method of claims 4, 5, 6 or 1 wherein said substrate is a glass substrate.
Claim 15
Independent Claim 15 words
The method of claims 4, 5, or 6 wherein said protective film comprises silicon oxide.
Claim 16
Dependent Claim 24 words
The method of claim 4, 5, 6 or 1 wherein said halogen element is contained at a concentration not higher than 5 atom %.
Claim 17
Dependent Claim 13 words
The method of claim 1 wherein said gate insulating layer comprises silicon oxide.
Claim 18
Dependent Claim 27 words
The method of claim 1 wherein said gate insulating layer comprises a material selected from the group consisting of alumina, tantalum oxide, barium titanate and silicon nitride.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-06-04 1999-12-04 2000-06-04 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-06-04 2003-12-04 2004-06-04 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-06-04 2007-12-04 2008-06-04 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag