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US4502204A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of manufacturing insulated gate thin film field effect transistors

Assignee: Citizen Watch Co Ltd
•
Filing: 1984-06-15
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Granted: 1985-03-05
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Expires: 2004-06-15
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Abstract

Abstract A method of manufacturing insulated gate thin film field effect transistors is disclosed in which first and second closely adjacent anodic oxidation electrodes are formed on an electrically insulating substrate, and a semiconducting layer is formed on the insulating substrate and the first and second anodic oxidation electrodes. An anodic oxidation of the semiconducting layer is performed, utilizing the first and second anodic oxidation electrodes, to form an oxide layer on the semiconducting layer. The oxide layer is then patterned to form a gate insulator and the semiconducting layer is patterned to expose a portion of each of the first and second anodic oxidation electrodes. The exposed portions of the first and second anodic oxidation electrodes are patterned to form source and drain electrodes, respectively.

Inventors

  • 👤 Seigo Togashi
  • 👤 Kanetaka Sekiguchi

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 20:36
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/031; H10D30/0312; H10D30/0314; H10D30/0321; H10D30/60; H10D30/67; H10D30/6729; H10D30/6737; H10D30/6739

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 136 words
A method of manufacturing an insulated gate thin film field effect transistor, comprising the steps of: forming first and second closely adjacent anodic oxidation electrodes upon an electrically insulating substrate; forming a semiconducting layer on said insulating substrate and said first and second anodic oxidation electrodes; performing anodic oxidation of said semiconducting layer, utilizing said first and second anodic oxidation electrodes, to thereby form a layer of oxide on said semiconducting layer; shaping said oxide layer to form a gate insulator; shaping said semiconducting layer to expose a portion of each of said first and second anodic oxidation electrodes; patterning exposed portions of said first and second anodic oxidation electrodes to form source and drain electrodes, respectively; and forming an electrically conducting layer on said oxide layer of said semiconducting layer to form a gate electrode.
Claim 2
Independent Claim 136 words
A method of manufacturing an insulated gate thin film field effect transistor, comprising the steps of: forming first and second closely adjacent anodic oxidation electrodes upon an electrically insulating substrate; forming a semiconducting layer on said insulating substrate and said first and second anodic oxidation electrodes; performing anodic oxidation of said semiconducting layer, utilizing said first and second anodic oxidation electrodes, to thereby form a layer of oxide on said semiconducting layer; shaping said oxide layer to form a gate insulator; shaping said semiconducting layer to expose a portion of each of said first and second anodic oxidation electrodes; patterning exposed portions of said first and second anodic oxidation electrodes to form source and drain electrodes, respectively; and forming an electrically conducting layer on said oxide layer of said semiconducting layer to form a gate electrode.
Claim 3
Dependent Claim 22 words
A method of manufacturing an insulated gate thin film field effect transistor according to claim 1, in which semiconductor layer comprises silicon.
Claim 4
Dependent Claim 27 words
A method of manufacturing an insulated gate thin film field effect transistor according to claim 2, in which said semiconducting layer comprises a layer of polycrystalline silicon.
Claim 5
Dependent Claim 31 words
A method of manufacturing an insulated gate thin film field effect transistor according to claim 3, in which said layer of polycrystalline silicon is formed by a chemical vapor deposition process.

References Cited (Backward Citations)

US3258663A Cited
US3699011A Cited
US3568305A Cited
US3391035A Cited
US3520051A Cited
US3616527A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1988-03-04 1988-09-03 1989-03-05 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1992-03-04 1992-09-03 1993-03-05 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1996-03-04 1996-09-03 1997-03-05 $7700.00 Window Closed / Lapsed

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