Method of making semiconductor integrated circuit having isolation oxide regions with different thickness

Claim 1

A method of manufacturing a semiconductor memory device having a plurality of devices on a main surface of a semiconductor substrate, said substrate having an impurity concentration of a selected conductivity type and having a first function region operative at a first voltage level and a second function region operative at a voltage level lower than said first voltage level, comprising the steps of: forming an oxide layer on said first function region and said second function region; forming a first mask layer on said oxide layer on said first function region and said second function region; removing portions of said mask layer on said first function region and said second function region, and forming inversion preventing layers on said main surface at the removed mask layer portions; forming isolation oxide layers at said substrate main surface for isolation between devices adjacent said inversion preventing layers; removing said first mask layer on said first function region and on said second function region; forming a second mask layer on said first function region; and removing said oxide layer and portions of said isolation oxide layers on said second function region; whereby the thickness of said isolation oxide layers formed on said first function region is thicker than the thickness of said isolation oxide layer formed on said second function region; introducing a first impurity through said isolation oxide layers of the second function region into said inversion preventing layers to increase impurity concentration of said inversion preventing layers of the second function region; and an additional step of introducing second impurity from above said isolation oxide layers of the second function region into said substrate.

Claim 2

A method of manufacturing a semiconductor memory device having a plurality of devices on a main surface of a semiconductor substrate, said substrate having an impurity concentration of a selected conductivity type and having a first function region operative at a first voltage level and a second function region operative at a voltage level lower than said first voltage level, comprising the steps of: forming an oxide layer on said first function region and said second function region; forming a first mask layer on said oxide layer on said first function region and said second function region; removing portions of said mask layer on said first function region and said second function region, and forming inversion preventing layers on said main surface at the removed mask layer portions; forming isolation oxide layers at said substrate main surface for isolation between devices adjacent said inversion preventing layers; removing said first mask layer on said first function region and on said second function region; forming a second mask layer on said first function region; and removing said oxide layer and portions of said isolation oxide layers on said second function region; whereby the thickness of said isolation oxide layers formed on said first function region is thicker than the thickness of said isolation oxide layer formed on said second function region; introducing a first impurity through said isolation oxide layers of the second function region into said inversion preventing layers to increase impurity concentration of said inversion preventing layers of the second function region; and an additional step of introducing second impurity from above said isolation oxide layers of the second function region into said substrate.

Claim 9

A method of manufacturing a semiconductor memory device having a plurality of devices on a main surface of a semiconductor substrate and having a first function region operative at a first voltage level and a second function region operative at a voltage level lower than said first voltage level, comprising the steps of: forming an oxide layer on said first and said second function regions; forming a mask layer having openings on said oxide layer; forming isolation oxide regions between devices at said openings in said first and said second function regions, said isolation oxide regions laterally encroaching on portions of said mask layer adjacent to said isolation oxide regions to form bird's beak; removing said bird's beak by uniformly etching said isolation oxide regions between devices in said second function region; whereby the thickness of said isolation oxide regions between devices in said first function region is thicker than the thickness of said isolation oxide regions between devices in said second function region; and including an additional step of introducing impurities of p and n types through said isolation oxide regions of the second function region into said substrate to increase impurity concentration of areas of said substrate below said isolation oxide regions in said second functional region.

Claim 10

A method of manufacturing a semiconductor memory device having a plurality of devices on a main surface of a semiconductor substrate and having a first function region operative at a first voltage level and a second function region operative at a voltage level lower than said first voltage level, comprising the steps of: forming an oxide layer on said first and said second function regions; forming a mask layer having openings on said oxide layer; forming isolation oxide regions between devices at said openings in said first and said second function regions, said isolation oxide regions laterally encroaching on portions of said mask layer adjacent to said isolation oxide regions to form bird's beak; removing said bird's beak by uniformly etching said isolation oxide regions between devices in said second function region; whereby the thickness of said isolation oxide regions between devices in said first function region is thicker than the thickness of said isolation oxide regions between devices in said second function region; and including an additional step of introducing impurities of p and n types through said isolation oxide regions of the second function region into said substrate to increase impurity concentration of areas of said substrate below said isolation oxide regions in said second functional region.