Method of producing a complementary-type semiconductor device

Claim 1

A method of producing a complementary-type semiconductor device comprising the steps of: forming a P type well region and an N type well region in a semiconductor substrate; forming an insulating film covering the surface of said P type and said N type well regions; forming a first gate electrode and a second gate electrode on said insulating film over said P type and said N type well regions respectively, said first gate electrode being provided with a channeling block layer thereon; implanting a first N type impurity into areas of said P type and N type well regions which are respectively located around said first and said second gate electrodes so as to form N type diffusion layers in said areas, wherein said channelling block layer is used as a mask for preventing said first N type impurity from channelling into said first gate electrode; implanting a second N type impurity into said N type diffusion layer formed in said P type well region so as to form an N + type diffusion layer therein, the impurity concentration of said N + type diffusion layer being higher than that of said N type diffusion layers; and implanting a P type impurity into the N type diffusion layer formed in said N type well region so as to form a P + type diffusion layer therein, the impurity concentration of said P + type diffusion layer being higher than that of said N type diffusion layers.

Claim 2

A method of producing a complementary-type semiconductor device comprising the steps of: forming a P type well region and an N type well region in a semiconductor substrate; forming an insulating film covering the surface of said P type and said N type well regions; forming a first gate electrode and a second gate electrode on said insulating film over said P type and said N type well regions respectively, said first gate electrode being provided with a channeling block layer thereon; implanting a first N type impurity into areas of said P type and N type well regions which are respectively located around said first and said second gate electrodes so as to form N type diffusion layers in said areas, wherein said channelling block layer is used as a mask for preventing said first N type impurity from channelling into said first gate electrode; implanting a second N type impurity into said N type diffusion layer formed in said P type well region so as to form an N + type diffusion layer therein, the impurity concentration of said N + type diffusion layer being higher than that of said N type diffusion layers; and implanting a P type impurity into the N type diffusion layer formed in said N type well region so as to form a P + type diffusion layer therein, the impurity concentration of said P + type diffusion layer being higher than that of said N type diffusion layers.

Claim 11

A method of producing a complementary-type semiconductor device comprising the steps of: forming a P type well region and an N type well region in a semiconductor substrate; forming an insulating film covering the surface of said P type and said N type well regions; forming a gate electrode layer on said insulating film; forming a photo-resist on said gate electrode layer in a predetermined pattern; etching said gate electrode layer except where said photo-resist is formed so as to form a first gate electrode and a second gate electrode over said P type and said N type well regions respectively; implanting a first N type impurity into areas of said P type and N type well regions which are respectively located around said first and said second gate electrodes so as to form N type diffusion layers in said areas, by using said photo-resist as a mask for preventing N type impurities from channelling into said first gate electrode; implanting a second N type impurity into said N type diffusion layers formed in said P type well region so as to form an N + type diffusion layer therein, the impurity concentration of said N + type diffusion layer being higher than that of said N type diffusion layers; and implanting a P type impurity into the N type diffusion layers formed in said N type well region so as to form a P + type diffusion layer therein, the impurity concentration of said P + type diffusion layer being higher than that of said N type diffusion layers.

Claim 12

A method of producing a complementary-type semiconductor device comprising the steps of: forming a P type well region and an N type well region in a semiconductor substrate; forming an insulating film covering the surface of said P type and said N type well regions; forming a gate electrode layer on said insulating film; forming a photo-resist on said gate electrode layer in a predetermined pattern; etching said gate electrode layer except where said photo-resist is formed so as to form a first gate electrode and a second gate electrode over said P type and said N type well regions respectively; implanting a first N type impurity into areas of said P type and N type well regions which are respectively located around said first and said second gate electrodes so as to form N type diffusion layers in said areas, by using said photo-resist as a mask for preventing N type impurities from channelling into said first gate electrode; implanting a second N type impurity into said N type diffusion layers formed in said P type well region so as to form an N + type diffusion layer therein, the impurity concentration of said N + type diffusion layer being higher than that of said N type diffusion layers; and implanting a P type impurity into the N type diffusion layers formed in said N type well region so as to form a P + type diffusion layer therein, the impurity concentration of said P + type diffusion layer being higher than that of said N type diffusion layers.

Claim 13

A method of producing a semiconductor device comprising the steps of: forming a P type well region in a semiconductor substrate; forming an insulating film covering the surface of said P type well region; forming a gate electrode layer on said insulating film; forming a photo-resist on said gate electrode layer in a predetermined pattern; etching said gate electrode layer except where said photo-resist is formed so as to form a gate electrode; implanting a first N type impurity into an area of said P type well region which is located around said gate electrode so as to form an N type diffusion layer therein, wherein said photo-resist is used as a mask for preventing said N type impurity from channelling into said gate electrode; and implanting a second N type impurity into said N type diffusion layers formed in said P type well region so as to form an N + type diffusion layer therein, the impurity concentration of said N + type diffusion layer being higher than that of said N type diffusion layer.

Claim 14

A method of producing a semiconductor device comprising the steps of: forming a P type well region in a semiconductor substrate; forming an insulating film covering the surface of said P type well region; forming a gate electrode layer on said insulating film; forming a photo-resist on said gate electrode layer in a predetermined pattern; etching said gate electrode layer except where said photo-resist is formed so as to form a gate electrode; implanting a first N type impurity into an area of said P type well region which is located around said gate electrode so as to form an N type diffusion layer therein, wherein said photo-resist is used as a mask for preventing said N type impurity from channelling into said gate electrode; and implanting a second N type impurity into said N type diffusion layers formed in said P type well region so as to form an N + type diffusion layer therein, the impurity concentration of said N + type diffusion layer being higher than that of said N type diffusion layer.

Claim 15

A method of producing a complementary-type semiconductor device comprising the steps of: forming a P type well region and an N type well region in a semiconductor substrate; forming an insulating film covering the surface of said P type and said N type well regions; forming a gate electrode layer on said insulating film; forming a photo-resist on said gate electrode layer in a predetermined pattern; etching said gate electrode layer except where said photo-resist is formed so as to form first and second gate electrodes over said P type and said N type well regions; and implanting a N type impurity into areas of said P type and N type well regions which are respectively located around said first and said second gate electrodes so as to form N type diffusion layers in said areas, wherein said photo-resist is used as a mask for preventing said first N type impurity from channelling in said first gate electrode.

Claim 16

A method of producing a complementary-type semiconductor device comprising the steps of: forming a P type well region and an N type well region in a semiconductor substrate; forming an insulating film covering the surface of said P type and said N type well regions; forming a gate electrode layer on said insulating film; forming a photo-resist on said gate electrode layer in a predetermined pattern; etching said gate electrode layer except where said photo-resist is formed so as to form first and second gate electrodes over said P type and said N type well regions; and implanting a N type impurity into areas of said P type and N type well regions which are respectively located around said first and said second gate electrodes so as to form N type diffusion layers in said areas, wherein said photo-resist is used as a mask for preventing said first N type impurity from channelling in said first gate electrode.