Method of improving cleaving of diode arrays

Claim 1

A method for separating individual diode arrays formed on a wafer having a plurality of rectangular diode array areas each of which includes a central row of uniformly spaced diode sites extending between its opposite ends, said areas being arranged on said wafer in multiple rows and columns, said wafer comprising a substrate provided with an epitaxial layer including said diode sites and with at least one additional layer overlying said epitaxial layer, said method comprising: providing said wafer with scribing channels exposing said epitaxial layer through said additional layer along cleavage lines separating said columns of array areas between the confronting ends of adjacent array areas, each of said cleavage lines being spaced from an endmost diode site of an adjacent diode area by a distance no greater than half the distance between diode sites along said row, each of said scribing channels extending from one edge of a row of array areas toward the center of said array areas but terminating short of said diode sites, said channels being of a width which, if extended to said diode sites, would encroach on the endmost ones thereof; scribing a cleavage groove along a cleavage line within a corresponding scribing channel between the confronting ends of adjacent pairs of diode array areas, said groove terminating short of the corresponding diode sites; and separating said adjacent array areas at opposite sides of said grooves fracturing said wafer along the corresponding cleavage line.

Claim 2

A method for separating individual diode arrays formed on a wafer having a plurality of rectangular diode array areas each of which includes a central row of uniformly spaced diode sites extending between its opposite ends, said areas being arranged on said wafer in multiple rows and columns, said wafer comprising a substrate provided with an epitaxial layer including said diode sites and with at least one additional layer overlying said epitaxial layer, said method comprising: providing said wafer with scribing channels exposing said epitaxial layer through said additional layer along cleavage lines separating said columns of array areas between the confronting ends of adjacent array areas, each of said cleavage lines being spaced from an endmost diode site of an adjacent diode area by a distance no greater than half the distance between diode sites along said row, each of said scribing channels extending from one edge of a row of array areas toward the center of said array areas but terminating short of said diode sites, said channels being of a width which, if extended to said diode sites, would encroach on the endmost ones thereof; scribing a cleavage groove along a cleavage line within a corresponding scribing channel between the confronting ends of adjacent pairs of diode array areas, said groove terminating short of the corresponding diode sites; and separating said adjacent array areas at opposite sides of said grooves fracturing said wafer along the corresponding cleavage line.