Process for fabricating dimensionally stable interconnect boards

Claim 2

A process for fabricating an electrical interconnect board which includes: (a) providing a dimensionally stable insulating substrate having a conductive pattern formed thereon; (b) forming via holes in a pyrolyzable film that includes an inorganic filler material and an organic binder material; (c) transferring said film on top of said conductive pattern and the surrounding insulating substrate surface such that said film is adhered to and dimensionally fixed thereon; (d) heating said insulating substrate, said conductive pattern and said pyrolyzable film to a predetermined elevated temperature sufficient to drive off the organic binder material in said film and securely fuse the inorganic filler material contained therein as a uniform dimensionally stable dielectric layer covering said substrate surface and the conductive pattern formed thereon; (e) metallizing the top surface of said dimensionally stable dielectric layer with a predetermined metallization pattern; and (f) repeating steps (b) through (e) until the electrical interconnect board is complete.

Claim 3

The process defined in claim 1 wherein said insulating substrate contains about 96% alumina, Al 2 O 3 , said inorganic material is a low firing temperature glass ceramic, and said pyrolyzable film is transferred to said insulating substrate using a chosen temperature and pressure to cause said film to adhere to said substrate.

Claim 4

The process defined in claims 1 or 2 wherein said substrate is comprised of from 88% to 99.5% alumina.

Claim 5

The process defined in claims 1 and 2 wherein said substrate is comprised of beryllium oxide.

Claim 6

The process defined in claims 1 or 2 wherein said pyrolyzable film is comprised of aluminum oxide (Al 2 O 3 ) and glass.

Claim 7

The process defined in claims 1 or 2 wherein said conductive pattern and said insulating layer are fired simultaneously.

Claim 8

The process defined in claims 1 or 2 wherein said substrate contains about 96% alumina and said inorganic material is a low firing temperature glass ceramic.

Claim 9

A process for fabricating an electrical interconnect board which includes: (a) providing a dimensionally stable substrate; (b) providing a pyrolyzable film that includes an inorganic filler material and an organic binder material having a predetermined via hole pattern disposed therein; (c) metallizing the top surface and via holes of said via hole pattern of said pyrolyzable film with a predetermined metallization pattern; (d) transferring said film to one surface of said substrate such that said film adheres to and becomes dimensionally fixed thereon; (e) heating said substrate and said pyrolyzable film to a predetermined elevated temperature sufficient to drive off the organic binder material in said film and securely fuse the inorganic filler material contained therein as a uniform dimensionally stable dielectric layer to said one surface of said substrate; and (f) repeating steps (b) through (e) until the electrical interconnect board is complete.

Claim 10

A process for fabricating an electrical interconnect board which includes: (a) providing a dimensionally stable substrate; (b) providing a pyrolyzable film that includes an inorganic filler material and an organic binder material having a predetermined via hole pattern disposed therein; (c) metallizing the top surface and via holes of said via hole pattern of said pyrolyzable film with a predetermined metallization pattern; (d) transferring said film to one surface of said substrate such that said film adheres to and becomes dimensionally fixed thereon; (e) heating said substrate and said pyrolyzable film to a predetermined elevated temperature sufficient to drive off the organic binder material in said film and securely fuse the inorganic filler material contained therein as a uniform dimensionally stable dielectric layer to said one surface of said substrate; and (f) repeating steps (b) through (e) until the electrical interconnect board is complete.

Claim 11

A process for fabricating an electrical interconnect board which includes: (a) providing a dimensionally stable substrate; (b) providing a pyrolyzable film that includes an inorganic filler material and an organic binder material having a predetermined via hole pattern disposed therein; (c) transferring said film to one surface of said substrate such that said film adheres to and becomes dimensionally fixed thereon; (d) heating said substrate and said pyrolyzable film to a predetermined elevated temperature sufficient to drive off the organic binder material in said film and securely fuse the inorganic filler material contained therein as a uniform dimensionally stable dielectric layer to said one surface of said substrate; and (e) metallizing the top surface and via holes of said via hole pattern of said dimensionally stable dielectric layer with a predetermined metallization pattern; (f) repeating steps (b) through (e) until the electrical interconnect board is complete.

Claim 12

A process for fabricating an electrical interconnect board which includes: (a) providing a dimensionally stable substrate; (b) providing a pyrolyzable film that includes an inorganic filler material and an organic binder material having a predetermined via hole pattern disposed therein; (c) transferring said film to one surface of said substrate such that said film adheres to and becomes dimensionally fixed thereon; (d) heating said substrate and said pyrolyzable film to a predetermined elevated temperature sufficient to drive off the organic binder material in said film and securely fuse the inorganic filler material contained therein as a uniform dimensionally stable dielectric layer to said one surface of said substrate; and (e) metallizing the top surface and via holes of said via hole pattern of said dimensionally stable dielectric layer with a predetermined metallization pattern; (f) repeating steps (b) through (e) until the electrical interconnect board is complete.

Claim 13

A process for fabricating a thick film electrically interconnected structure which includes: (a) providing a dimensionally stable insulating substrate having a conductive pattern thereon; (b) providing a glass-ceramic tape layer having predefined via holes extending therethrough from one major surface thereof to the other; (c) adhering said tape layer to the top surface of said insulating substrate having said conductive pattern thereon; (d) firing said tape layer and said insulating substrate at a predetermined elevated temperature to provide a thick film structure having lateral dimensional stability; (e) metallizing the top surface of said tape layer with a predetermined metallization pattern; and (f) repeating steps (b) through (e) until the thick film electrically interconnected structure is complete.

Claim 14

A process for fabricating a thick film electrically interconnected structure which includes: (a) providing a dimensionally stable insulating substrate having a conductive pattern thereon; (b) providing a glass-ceramic tape layer having predefined via holes extending therethrough from one major surface thereof to the other; (c) adhering said tape layer to the top surface of said insulating substrate having said conductive pattern thereon; (d) firing said tape layer and said insulating substrate at a predetermined elevated temperature to provide a thick film structure having lateral dimensional stability; (e) metallizing the top surface of said tape layer with a predetermined metallization pattern; and (f) repeating steps (b) through (e) until the thick film electrically interconnected structure is complete.

Claim 15

The process defined in claim 10 wherein said substrate is primarily alumina and said tape layer includes from 40% to 60% alumina, a chosen borosilicate glass and an organic binder material which is driven off during firing.

Claim 16

The process defined in claim 10 or 11 wherein said tape layer is transferred to said insulating substrate using chosen temperature and pressure to cause said tape layer to adhere to said substrate.

Claim 17

The process defined in claims 10 or 11 wherein said substrate is comprised of 88% to 99.5% alumina.

Claim 18

The process defined in claims 10 or 11 wherein said substrate is comprised of beryllium oxide.

Claim 19

The process defined in claims 10 or 11 wherein said tape layer is comprised of aluminum oxide (Al 2 O 3 ) and glass.

Claim 20

The process defined in claims 10 or 11 wherein said conductive pattern and said insulating layer are fired simultaneously.

Claim 21

A process for fabricating an electrical interconnect board which includes the steps of: (a) providing a dimensionally stable insulating substrate; (b) applying a first conductive layer to one surface of said substrate; (c) heating said substrate and said conductive layer to form a unitary structure (d) providing a pyrolyzable film that includes an inorganic filler material and an organic binder material, said film having a predetermined hole pattern therein; (e) adhering said pyrolyzable film to one surface of said substrate such that said hole pattern is dimensionally fixed; (f) heating said substrate and said pyrolyzable film to a predetermined elevated temperature sufficient to drive off the organic binder material in said film and securely fuse the inorganic filler material contained therein as a uniform dimensionally stable dielectric layer covering said one surface of said substrate; (g) filling said hole pattern of said pyrolyzable film with metal; (h) heating said substrate, said film and said filled hole pattern to form a unitary structure; (i) applying a second conductive layer to the top surface to said filled pyrolyzable film; (j) heating said substrate, said film and said second conductive layer to form a unitary structure; (k) repeating steps (d) through (j) until said electrical interconnect board is fabricated.

Claim 22

A process for fabricating an electrical interconnect board which includes the steps of: (a) providing a dimensionally stable insulating substrate; (b) applying a first conductive layer to one surface of said substrate; (c) heating said substrate and said conductive layer to form a unitary structure (d) providing a pyrolyzable film that includes an inorganic filler material and an organic binder material, said film having a predetermined hole pattern therein; (e) adhering said pyrolyzable film to one surface of said substrate such that said hole pattern is dimensionally fixed; (f) heating said substrate and said pyrolyzable film to a predetermined elevated temperature sufficient to drive off the organic binder material in said film and securely fuse the inorganic filler material contained therein as a uniform dimensionally stable dielectric layer covering said one surface of said substrate; (g) filling said hole pattern of said pyrolyzable film with metal; (h) heating said substrate, said film and said filled hole pattern to form a unitary structure; (i) applying a second conductive layer to the top surface to said filled pyrolyzable film; (j) heating said substrate, said film and said second conductive layer to form a unitary structure; (k) repeating steps (d) through (j) until said electrical interconnect board is fabricated.

Claim 23

A process for fabricating an electrical interconnect board which includes: (a) providing a dimensionally stable substrate; (b) providing a pyrolyzable film that includes an inorganic filler material and an organic binder material having a predetermined via hole pattern disposed therein; (c) transferring said film to one surface of said substrate such that said film adheres to and becomes dimensionally fixed thereon; and (d) heating said substrate and said pyrolyzable film to a predetermined elevated temperature sufficient to drive off the organic binder material in said film and securely fuse the inorganic filler material contained therein as a uniform dimensionally stable dielectric layer to said one surface of said substrate; (e) metallizing the top surface of said dimensionally stable dielectric layer with a predetermined metallization pattern; and (f) repeating steps (b) through (e) until the electrical interconnect board is complete.

Claim 24

A process for fabricating an electrical interconnect board which includes: (a) providing a dimensionally stable substrate; (b) providing a pyrolyzable film that includes an inorganic filler material and an organic binder material having a predetermined via hole pattern disposed therein; (c) transferring said film to one surface of said substrate such that said film adheres to and becomes dimensionally fixed thereon; and (d) heating said substrate and said pyrolyzable film to a predetermined elevated temperature sufficient to drive off the organic binder material in said film and securely fuse the inorganic filler material contained therein as a uniform dimensionally stable dielectric layer to said one surface of said substrate; (e) metallizing the top surface of said dimensionally stable dielectric layer with a predetermined metallization pattern; and (f) repeating steps (b) through (e) until the electrical interconnect board is complete.

Claim 25

A process for fabricating an electrical interconnect board which includes the steps of: (a) providing a dimensionally stable substrate; (b) providing a pyrolyzable film that includes an inorganic filler material and an organic binder material, said film having a predetermined via hole pattern therein; (c) adhering said pyrolyzable film to one surface of said substrate such that said hole pattern is dimensionally fixed; (d) heating said substrate and said pyrolyzable film to a predetermined elevated temperature sufficient to drive off the organic binder material in said film and securely fuse the inorganic filler material contained therein as a uniform dimensionally stable dielectric layer covering said one surface of said substrate; (e) filling said via hole pattern of said pyrolyzable film with metal; (f) heating said substrate, said film and said filled hole pattern to form a unitary structure; (g) applying a second conductive layer to the top surface to said filled pyrolyzable film; (h) heating said substrate, said film and said second conductive layer to form a unitary structure; (i) repeating steps (b) through (h) until said electrical interconnect board is fabricated.

Claim 26

A process for fabricating an electrical interconnect board which includes the steps of: (a) providing a dimensionally stable substrate; (b) providing a pyrolyzable film that includes an inorganic filler material and an organic binder material, said film having a predetermined via hole pattern therein; (c) adhering said pyrolyzable film to one surface of said substrate such that said hole pattern is dimensionally fixed; (d) heating said substrate and said pyrolyzable film to a predetermined elevated temperature sufficient to drive off the organic binder material in said film and securely fuse the inorganic filler material contained therein as a uniform dimensionally stable dielectric layer covering said one surface of said substrate; (e) filling said via hole pattern of said pyrolyzable film with metal; (f) heating said substrate, said film and said filled hole pattern to form a unitary structure; (g) applying a second conductive layer to the top surface to said filled pyrolyzable film; (h) heating said substrate, said film and said second conductive layer to form a unitary structure; (i) repeating steps (b) through (h) until said electrical interconnect board is fabricated.

Claim 27

The process defined in claims 18 or 19 wherein said pyrolyzable film is comprised of aluminum oxide and glass.

Claim 28

The process defined in claims 18 or 19 wherein said substrate is comprised of metal.

Claim 29

The process defined in claims 18 or 19 wherein said pyrolyzable film is transferred to said substrate using a chosen temperature and pressure to cause said film to adhere thereto.

Claim 30

The process defined in claims 18 or 19 wherein said substrate contains about 96% alumina and said inorganic material is a low firing temperature glass ceramic.

Claim 31

The process defined in claims 18 or 19 wherein said substrate is comprised of 88% to 99.5% alumina.

Claim 32

The process defined in claims 18 or 19 wherein said substrate is comprised of beryllium oxide.