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Field effect-transistor with asymmetrical structure
Assignee: International Business Machines Corp
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Filing: 1989-06-09
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Granted: 1991-11-05
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Expires: 2009-06-09
Abstract
Abstract A field effect transistor of asymmetrical structure comprises: a semiconductor substrate of first conductivity type; source and drain regions of second conductivity type disposed in a surface of the substrate and spaced apart by a channel region; and a single, lightly doped extension of the drain region into the channel, the extension being of the second conductivity type and of a lower dopant concentration than the drain region. The transistor can further beneficially comprise a halo region of the first conductivity type in the substrate generally surrounding only the source region.
Inventors
- 👤 Christopher F. Codella
- 👤 Nivo Rovedo
- 👤 Seiki Ogura
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 12:54
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0221; H10D30/60; H10D30/601; H10D30/603; H10D30/605; H10D62/00; H10D62/10; H10D62/17; H10D62/213; H10D62/221; H10D62/235; H10D62/299; H10D62/307; H10D62/351; H10D62/357; H10D62/364; H10D62/371; H10D64/00; H10D64/01; H10D64/013; H10D64/01302; H10D64/01304; H10D64/01326; H10D64/01328
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
234 words
A method of forming a field effect transistor, comprising the steps of: providing a semiconductor substrate of first conductivity type; forming a generally conformal layer of gate electrode material over said substrate; forming a mask over said layer of gate electrode material, said mask including a generally vertical edge situated over said substrate; forming a halo region of said first conductivity type in said substrate self-aligned with said vertical edge of said mask; forming a source region of said second conductivity type in said halo region; using said mask to define a gate electrode from said layer of gate electrode material while exposing a previously masked portion of said substrate adjoining said gate electrode; forming a lightly doped region of said second conductivity type in said substrate self-aligned with an edge of said gate electrode on a side of said gate electrode opposite said source region; forming a sidewall of protective material on the side of said gate electrode overlying said lightly doped region; and forming a drain region of said second conductivity type in said substrate using said gate electrode and said sidewall as a mask such that said lightly doped region extends said drain region under said sidewall; said step of forming said source region performed before said steps of forming said lightly doped region and said sidewall so that said lightly doped region extends only said drain region under said sidewall.
Claim 2
Independent Claim
234 words
A method of forming a field effect transistor, comprising the steps of: providing a semiconductor substrate of first conductivity type; forming a generally conformal layer of gate electrode material over said substrate; forming a mask over said layer of gate electrode material, said mask including a generally vertical edge situated over said substrate; forming a halo region of said first conductivity type in said substrate self-aligned with said vertical edge of said mask; forming a source region of said second conductivity type in said halo region; using said mask to define a gate electrode from said layer of gate electrode material while exposing a previously masked portion of said substrate adjoining said gate electrode; forming a lightly doped region of said second conductivity type in said substrate self-aligned with an edge of said gate electrode on a side of said gate electrode opposite said source region; forming a sidewall of protective material on the side of said gate electrode overlying said lightly doped region; and forming a drain region of said second conductivity type in said substrate using said gate electrode and said sidewall as a mask such that said lightly doped region extends said drain region under said sidewall; said step of forming said source region performed before said steps of forming said lightly doped region and said sidewall so that said lightly doped region extends only said drain region under said sidewall.
Claim 3
Dependent Claim
26 words
A method in accordance with claim 1 wherein said steps of forming said first and second regions include implanting ions into said surface of said substrate.
Claim 4
Dependent Claim
46 words
A method in accordance with claim 1 wherein: said steps of forming a mask includes forming a sidewall on said mask edge; and said step of using said mask to define a gate electrode includes the step of using said sidewall to define said gate electrode.
Claim 5
Dependent Claim
29 words
A method in accordance with claim 1 and further including the step of forming a layer of insulating material intermediate said substrate and said layer of gate electrode material.
Claim 6
Dependent Claim
68 words
A field effect transistor of asymmetrical structure comprising: a semiconductor substrate of first conductivity type; source and drain regions of second conductivity type disclosed in a surface of said substrate and spaced apart by a channel region; and a single, lightly doped extension of said drain region into said channel, said extension being of said second conductivity type and of a lower dopant concentration than said drain region.
Claim 7
Dependent Claim
68 words
A field effect transistor of asymmetrical structure comprising: a semiconductor substrate of first conductivity type; source and drain regions of second conductivity type disclosed in a surface of said substrate and spaced apart by a channel region; and a single, lightly doped extension of said drain region into said channel, said extension being of said second conductivity type and of a lower dopant concentration than said drain region.
Claim 8
Dependent Claim
17 words
The field effect transistor of claim 5 wherein said extension is proximate said surface of said substrate.
Claim 9
Dependent Claim
26 words
The field effect transistor of claim 6 and further including a gate electrode overlying said channel region and insulated from the surface of said channel region.
Claim 10
Dependent Claim
97 words
A field effect transistor of asymmetrical structure comprising: a semiconductor substrate of first conductivity type; source and drain regions of second conductivity type disposed in a surface of said substrate and spaced apart by a channel region; a single halo region generally surrounding said source region in said substrate, said halo region of said first conductivity type and of a higher doping concentration than said substrate; and a single lightly doped extension of said drain region into said channel, said extension being of said second conductivity type and of a lower dopant concentration than said drain region.
Claim 11
Dependent Claim
97 words
A field effect transistor of asymmetrical structure comprising: a semiconductor substrate of first conductivity type; source and drain regions of second conductivity type disposed in a surface of said substrate and spaced apart by a channel region; a single halo region generally surrounding said source region in said substrate, said halo region of said first conductivity type and of a higher doping concentration than said substrate; and a single lightly doped extension of said drain region into said channel, said extension being of said second conductivity type and of a lower dopant concentration than said drain region.
Claim 12
Dependent Claim
19 words
A field effect transistor in accordance with claim 8 wherein said extension is proximate said surface of said substrate.
Claim 13
Dependent Claim
24 words
A field effect transistor in accordance with claim 9 wherein said extension is of a shallower depth into said substrate than said drain region.
Claim 14
Dependent Claim
26 words
A field effect transistor in accordance with claim 8 and further including a gate electrode situated over said channel region and insulated from said channel region.
Claim 15
Dependent Claim
29 words
A field effect transistor in accordance with claim 11 wherein said gate electrode generally spans said channel to overlap said drain extension, said halo region, and said source region.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-11-04 | 1995-05-06 | 1995-11-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-11-04 | 1999-05-06 | 1999-11-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-11-04 | 2003-05-06 | 2003-11-05 | $7700.00 | Window Closed / Lapsed |