US6420074B2
Expired / Lapsed
US
⏱️ 0.0 years remaining
Phase shifting circuit manufacture method and apparatus
Assignee: Synopsys Inc
•
Filing: 2000-12-07
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Granted: 2002-07-16
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Expires: 2020-12-07
Abstract
Abstract A method and apparatus for creating a phase shifting mask and a structure mask for shrinking integrated circuit designs. One embodiment of the invention includes using a two mask process. The first mask is a phase shift mask and the second mask is a single phase structure mask. The phase shift mask primarily defines regions requiring phase shifting. The single phase structure mask primarily defines regions not requiring phase shifting. The single phase structure mask also prevents the erasure of the phase shifting regions and prevents the creation of undesirable artifact regions that would otherwise be created by the phase shift mask. Both masks are derived from a set of masks used in a larger minimum dimension process technology.
Inventors
- 👤 Yao-Ting Wang
- 👤 Yagyensh Pati
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 22:15
CPC Classifications
G; G03; G03F; G03F7/00; G03F7/70; G03F7/70216; G03F7/70283; G03F1/00; G03F1/26; G03F1/30; G03F1/34; G03F1/36; G03F1/68; G03F1/70; G03F7/20; G03F7/2022; G03F7/70425; G03F7/70433; G03F7/70441; G03F7/70483; G03F7/70491; G03F7/705; G06; G06F; G06F30/00; G06F30/30; G06F30/39
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
94 words
A method for manufacturing a set of masks, comprising: creating a phase shift layout file having phase shift areas in an opaque field to define a gate length dimension for a transistor having a diffusion region with a first width, the phase shift area having a width equal to the width of the diffusion region plus extension dimensions sufficient to tolerate mask misalignment errors, and creating a structure layout file having opaque areas to define other structures; and manufacturing at least one mask using the phase shift layout file and the structure layout file.
Claim 2
Independent Claim
94 words
A method for manufacturing a set of masks, comprising: creating a phase shift layout file having phase shift areas in an opaque field to define a gate length dimension for a transistor having a diffusion region with a first width, the phase shift area having a width equal to the width of the diffusion region plus extension dimensions sufficient to tolerate mask misalignment errors, and creating a structure layout file having opaque areas to define other structures; and manufacturing at least one mask using the phase shift layout file and the structure layout file.
Claim 3
Dependent Claim
19 words
The method of claim 1 , wherein the extension dimensions are defined according to an alignment error design rule.
Claim 4
Independent Claim
79 words
A method for manufacturing a set of masks, comprising: creating a phase shift layout file having phase shift areas in an opaque field to define a structure; creating a structure layout file having opaque areas to define other structures, the opaque areas being spaced away by clear areas from the phase shift areas by protection dimensions sufficient to tolerate mask misalignment errors; and manufacturing at least one mask using the phase shift layout file and the structure layout file.
Claim 5
Independent Claim
79 words
A method for manufacturing a set of masks, comprising: creating a phase shift layout file having phase shift areas in an opaque field to define a structure; creating a structure layout file having opaque areas to define other structures, the opaque areas being spaced away by clear areas from the phase shift areas by protection dimensions sufficient to tolerate mask misalignment errors; and manufacturing at least one mask using the phase shift layout file and the structure layout file.
Claim 6
Dependent Claim
19 words
The method of claim 3 , wherein the extension dimensions are defined according to an alignment error design rule.
Claim 7
Independent Claim
88 words
A method for manufacturing a set of masks, comprising: creating a phase shift layout file having phase shift areas in an opaque field to define a structure; creating a structure layout file having opaque areas to define other structures and protect areas to protect the structure from exposure, the protect area having a width equal to the width of the diffusion region plus protection dimensions sufficient to tolerate mask misalignment errors; and manufacturing at least one mask using the phase shift layout file and the structure layout file.
Claim 8
Independent Claim
88 words
A method for manufacturing a set of masks, comprising: creating a phase shift layout file having phase shift areas in an opaque field to define a structure; creating a structure layout file having opaque areas to define other structures and protect areas to protect the structure from exposure, the protect area having a width equal to the width of the diffusion region plus protection dimensions sufficient to tolerate mask misalignment errors; and manufacturing at least one mask using the phase shift layout file and the structure layout file.
Claim 9
Dependent Claim
19 words
The method of claim 5 , wherein the extension dimensions are defined according to an alignment error design rule.
Claim 10
Independent Claim
116 words
A method for manufacturing a set of masks, comprising: creating a phase shift layout file having phase shift areas in an opaque field to shrink a gate length dimension for a transistor to a smaller dimension, wherein the phase shift areas includes a θ degree phase shift area, and an adjacent (180+θ) phase shift area, and a chrome strip between the θ degree phase shift area, and the adjacent (180+θ) phase shift area, the chrome strip having a width affecting the smaller dimension of the gate length; creating a structure layout file having opaque areas to define other structures; and manufacturing at least one mask using the phase shift layout file and the structure layout file.
Claim 11
Independent Claim
116 words
A method for manufacturing a set of masks, comprising: creating a phase shift layout file having phase shift areas in an opaque field to shrink a gate length dimension for a transistor to a smaller dimension, wherein the phase shift areas includes a θ degree phase shift area, and an adjacent (180+θ) phase shift area, and a chrome strip between the θ degree phase shift area, and the adjacent (180+θ) phase shift area, the chrome strip having a width affecting the smaller dimension of the gate length; creating a structure layout file having opaque areas to define other structures; and manufacturing at least one mask using the phase shift layout file and the structure layout file.
Claim 12
Independent Claim
112 words
A method for manufacturing a set of masks, comprising: creating a first layout file having first and second clear areas in an opaque field, the first and second clear areas separated by an opaque line to form a gate length dimension for a transistor having a diffusion region with a first width, the first and second clears areas having a width equal to the width of the diffusion region plus extension dimensions sufficient to tolerate mask misalignment errors, and creating a second layout file having opaque areas to define other structures; and manufacturing a first mask using the first layout file layout file and a second mask using the second layout file.
Claim 13
Independent Claim
112 words
A method for manufacturing a set of masks, comprising: creating a first layout file having first and second clear areas in an opaque field, the first and second clear areas separated by an opaque line to form a gate length dimension for a transistor having a diffusion region with a first width, the first and second clears areas having a width equal to the width of the diffusion region plus extension dimensions sufficient to tolerate mask misalignment errors, and creating a second layout file having opaque areas to define other structures; and manufacturing a first mask using the first layout file layout file and a second mask using the second layout file.
Claim 14
Dependent Claim
19 words
The method of claim 8 , wherein the extension dimensions are defined according to an alignment error design rule.
Claim 15
Dependent Claim
22 words
The method of claim 8 , wherein the first and second clear areas are adapted to cause different amounts of phase shifting.
Claim 16
Dependent Claim
22 words
The method of claim 8 , wherein the opaque line comprises a chrome strip having a width affecting the gate length dimension.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2005-07-15 | 2006-01-14 | 2006-07-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2009-07-15 | 2010-01-14 | 2010-07-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2013-07-15 | 2014-01-14 | 2014-07-16 | $7700.00 | Window Closed / Lapsed |