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US6411480B1 Expired / Lapsed US ⏱️ 0.0 years remaining

Substrate pumped ESD network with trench structure

Assignee: International Business Machines Corp
•
Filing: 1999-03-01
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Granted: 2002-06-25
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Expires: 2019-03-01
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Abstract

Abstract An ESD protection circuit which may be implemented in thin epitaxial substrate surfaces. The protection device includes a MOSFET transistor or bipolar transistor implemented in a trench isolated area of the substrate. The isolation of the MOSFET transistor permits the substrate region to be pumped with an electric charge which reduces the trigger/snapback voltage and MOSFET threshold voltage for the device. A trigger current supplies the pumping current to the isolated substrate area when a transient voltage is applied thus lowering the trigger/snapback voltage of the MOSFET transistor in the presence of a transient voltage.

Inventors

  • 👤 Robert J. Gauthier
  • 👤 Steven H. Voldman

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-06 20:11
CPC Classifications
H; H10; H10D; H10D89/00; H10D89/60; H10D89/601; H10D89/711

Claims Analysis

Total Claims: 20
Claim 1
Independent Claim 85 words
A circuit for protecting an integrated circuit from a transient voltage comprising: a MOSFET transistor placed in an isolated substrate area, having a drain connection and a source connection serially connected between a terminal of said integrated circuit and a common terminal for said integrated circuit, and a gate connection which is coupled to said terminal; and a trigger circuit connected between said terminal and said isolated substrate area, for raising the voltage potential in the isolated substrate area in response to a transient voltage.
Claim 2
Dependent Claim 85 words
A circuit for protecting an integrated circuit from a transient voltage comprising: a MOSFET transistor placed in an isolated substrate area, having a drain connection and a source connection serially connected between a terminal of said integrated circuit and a common terminal for said integrated circuit, and a gate connection which is coupled to said terminal; and a trigger circuit connected between said terminal and said isolated substrate area, for raising the voltage potential in the isolated substrate area in response to a transient voltage.
Claim 3
Dependent Claim 27 words
The circuit according to claim 1 wherein said isolated substrate area comprises a trench formed in said substrate, extending below a surface area containing said MOSFET transistor.
Claim 4
Dependent Claim 17 words
The circuit according to claim 1 wherein said trigger circuit is formed in said isolated substrate area.
Claim 5
Dependent Claim 21 words
The circuit according to claim 1 wherein said trigger circuit comprises a vertical PNP transistor formed in said isolated substrate area.
Claim 6
Dependent Claim 22 words
The circuit according to claim 3 wherein said trigger circuit comprises a pFET in said isolated substrate forming a PNP vertical transistor.
Claim 7
Dependent Claim 39 words
The circuit according to claim 1 wherein said MOSFET has said gate connection connected to said terminal through a capacitor, and connected to said source through a resistor, whereby said transient voltage is capacitively coupled to said gate connection.
Claim 8
Dependent Claim 31 words
The circuit according to claim 1 further comprising a second MOSFET transistor having a drain connection and source connection connected in series with said first MOSFET transistor drain and source connections.
Claim 9
Dependent Claim 22 words
The circuit according to claim 1 wherein said trigger circuit comprises two pFET transistors in series formed in said isolated substrate area.
Claim 10
Dependent Claim 101 words
A circuit for locally controlling a transient voltage potential on a terminal of an integrated circuit comprising: a isolated substrate area having an active element formed therein, the isolated substrate area defined by an isolation region extending into the integrated circuit substrate to a depth greater than a depth of the active element; a trigger circuit coupled to the isolated substrate area and to a node undergoing a transient voltage event for transiently raising a potential of the isolated substrate area in response to the transient voltage event and reducing the turn on voltage and/or electric potential of the active element.
Claim 11
Dependent Claim 101 words
A circuit for locally controlling a transient voltage potential on a terminal of an integrated circuit comprising: a isolated substrate area having an active element formed therein, the isolated substrate area defined by an isolation region extending into the integrated circuit substrate to a depth greater than a depth of the active element; a trigger circuit coupled to the isolated substrate area and to a node undergoing a transient voltage event for transiently raising a potential of the isolated substrate area in response to the transient voltage event and reducing the turn on voltage and/or electric potential of the active element.
Claim 12
Dependent Claim 23 words
The circuit for locally controlling a transient voltage potential according to claim 9 wherein said trigger circuit comprises a voltage or current source.
Claim 13
Dependent Claim 24 words
The circuit for locally controlling a transient voltage potential according to claim 9 wherein the trigger circuit is formed in the isolated substrate area.
Claim 14
Dependent Claim 25 words
The circuit for locally controlling a transient voltage potential according to claim 9 wherein the isolation region is formed by the integrated circuit in substrate.
Claim 15
Dependent Claim 26 words
The circuit for locally controlling a transient voltage potential according to claim 9 wherein said isolated substrate area is resistively isolated from an adjacent substrate area.
Claim 16
Dependent Claim 65 words
A circuit for protecting a semiconductor device from transient voltages comprising: a transistor for dissipating said transient voltages to a common connection; a pumping circuit for charging a substrate area containing said transistor thereby lowering the threshold voltage of said transistor; and a pulse differentiation circuit for coupling said transient voltage to said transistor whereby said transistor is rendered conducting at said lower threshold voltage.
Claim 17
Dependent Claim 65 words
A circuit for protecting a semiconductor device from transient voltages comprising: a transistor for dissipating said transient voltages to a common connection; a pumping circuit for charging a substrate area containing said transistor thereby lowering the threshold voltage of said transistor; and a pulse differentiation circuit for coupling said transient voltage to said transistor whereby said transistor is rendered conducting at said lower threshold voltage.
Claim 18
Dependent Claim 27 words
The circuit for protecting semiconductor device according to claim 14 wherein said pumping circuit charges said substrate area containing said transistor in response to said transient voltage.
Claim 19
Dependent Claim 31 words
The circuit for protecting a semiconductor device according to claim 14 wherein said transistor is field effect transistor having a conduction channel located above said area charged by said pumping circuit.
Claim 20
Dependent Claim 22 words
The circuit for protecting a semiconductor device according to claim 14 wherein said substrate area is contained in an isolated trench area.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2005-06-24 2005-12-24 2006-06-25 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2009-06-24 2009-12-24 2010-06-25 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2013-06-24 2013-12-24 2014-06-25 $7700.00 Window Closed / Lapsed

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