Semiconductor device

Abstract

Abstract PURPOSE:To obtain a highly reliable semiconductor device whose resistance to an ESD with reference to both a Vcc and a Vss is large by a method wherein a semiconductor region, of a second conductivity type, which is connected individually to a pad for signal input use, a wiring part of a first potential and a wiring part of a second potential is formed inside a semiconductor substrate of a first conductivity type. CONSTITUTION:The following are provided: a semiconductor substrate 12 of a first conductivity type; a first semiconductor region 14, of a second conductivity type, which is formed inside the substrate 12 and is connected to a pad 16 for signal input use; a second semiconductor region 13, of the second conductivity type, which is connected to a wiring part of a first potential Vcc; a third semiconductor region 15, of the second conductivity type, which is formed inside the substrate 12 and is connected to a wiring part of a second potential Vss. Thereby, parasitic bipolar transistors 17, 18 as indicated in the figure are constituted; only when an excess voltage such as an ESD is input to the pad 16, they become conductive by making use of a P<+> region such as a guard-ring diffusion layer or the like as a base; the excess voltage is absorbed by the wiring part of either the power-supply voltage Vcc or a grounding voltage Vss which can be absorbed more easily.

Inventors

• 👤 Mitsuru Shimizu
• 👤 満 清水
• 👤 Hidemasa Fujii
• 👤 藤井　秀壮
• 👤 Yoshio Okada
• 👤 芳夫 岡田
• 👤 Shozo Saito
• 👤 斎藤　昇三

Bibliographic Details