Electrostatic discharge protection device for integrated circuits and its method for fabrication

Claim 1

An electrostatic discharge device, comprising: a semiconductor substrate; an isolating structure formed on said substrate; a drain region and a source region formed in said substrate beneath opposite sides of said isolating structure, each of which is composed of a heavily-doped region and a lightly-doped region wherein said lightly-doped region has a junction depth greater than said heavily-doped region; a first conducting block formed above and physically connecting directly to the lightly-doped region in said drain region; a second conducting block formed above and physically connecting directly to the lightly-doped region in said source region; a dielectric layer covering said isolating structure, source region, and drain region, first conducting block, and second conducting block, having a first contact window and a second contact window therethrough to expose said first conducting block and second conducting block, respectively; a first electrode formed on said dielectric layer and coupled to said first conducting block via said first contact window; and a second electrode formed on said dielectric layer and coupled to said second conducting block via said second contact window.

Claim 9

A method for fabricating an electrostatic discharge protection device, comprising: providing a semiconductor substrate; forming a field oxide layer on said substrate; forming a diffusion barrier on said substrate not covered by said field oxide layer; forming two openings through said diffusion barrier on opposite sides of said field oxide layer; forming a polysilicon layer on said barrier layer to contact said substrate via said openings, wherein said polysilicon layer is doped with impurities; diffusing said impurities, into said substrate to form two lightly-doped regions under said openings, respectively; patterning said polysilicon layer to form two conducting blocks on said lightly-doped regions, respectively; implanting ions into said substrate not covered by said field oxide layer and said conducting blocks to form heavily-doped regions, which have junction depths less than that of said lightly-doped regions; forming a dielectric layer overlying the overall surface of said device; forming two contact windows through said dielectric layer, each window exposing one of said conducting blocks; and forming two electrodes, each electrode connected to one of said conducting blocks via a respective one of said contact windows.

Claim 10

A method for fabricating an electrostatic discharge protection device, comprising: providing a semiconductor substrate; forming a field oxide layer on said substrate; forming a diffusion barrier on said substrate not covered by said field oxide layer; forming two openings through said diffusion barrier on opposite sides of said field oxide layer; forming a polysilicon layer on said barrier layer to contact said substrate via said openings, wherein said polysilicon layer is doped with impurities; diffusing said impurities, into said substrate to form two lightly-doped regions under said openings, respectively; patterning said polysilicon layer to form two conducting blocks on said lightly-doped regions, respectively; implanting ions into said substrate not covered by said field oxide layer and said conducting blocks to form heavily-doped regions, which have junction depths less than that of said lightly-doped regions; forming a dielectric layer overlying the overall surface of said device; forming two contact windows through said dielectric layer, each window exposing one of said conducting blocks; and forming two electrodes, each electrode connected to one of said conducting blocks via a respective one of said contact windows.

Claim 17

The method as claimed in claim, 14, wherein said one electrode is connected to a bond pad.