Patent US6344413B1 successfully refreshed from Google Patents.
← Back to Patent Explorer
US6344413B1 Expired / Lapsed US ⏱️ 0.0 years remaining

Method for forming a semiconductor device

Assignee: NXP USA Inc
•
Filing: 1998-02-12
•
Granted: 2002-02-05
•
Expires: 2018-02-12
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract Method for forming a semiconductor device having an capacitor, where the capacitor is in-laid in a cavity formed in the semiconductor substrate and part of a high density memory. One embodiment first forms a bottom electrode in the cavity and then fills the cavity with a sacrificial layer to allow chemical mechanical polishing (CMP) of at least one of the capacitor electrodes. After removing portions of the bottom electrode and portions of the sacrificial layer, a dielectric layer is formed. A top electrode is then formed over the dielectric layer. The dielectric layer so formed isolates the bottom electrode from the top electrode preventing shorting and leakage currents. In one embodiment, a single top electrode layer is formed for multiple bottom electrodes, reducing the complexity of the memory circuit.

Inventors

  • 👤 Peter Zurcher
  • 👤 Robert E. Jones, Jr.
  • 👤 Papu D. Maniar
  • 👤 Peir Chu

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 04:34
CPC Classifications
H; H10; H10D; H10D1/00; H10D1/01; H10D1/041; H10D1/042; H10P; H10P52/00; H10P52/40; H10P52/403; H10B; H10B12/00; H10B12/01; H10B12/02; H10B12/03; H10B12/033; H10B12/0335; H10D1/60; H10D1/68; H10D1/682; H10D1/692; H10B12/30; H10B12/48; H10D1/694; H10D84/00; H10D84/891

Claims Analysis

Total Claims: 38
Claim 1
Independent Claim 167 words
A method of forming a semiconductor device, the semiconductor device comprising a substrate, the method comprising: forming a first dielectric layer on the substrate; forming a first capacitor cavity in the first dielectric layer, wherein the substrate has an exposed surface within the capacitor cavity; forming a first capacitor electrode layer over along substantially all the exposed surface of the first dielectric layer; removing a portion of the first capacitor electrode layer to expose the upper surface of the first dielectric layer to form a first capacitor electrode in the capacitor cavity, wherein the first capacitor electrode lies along substantially all the exposed surface of the first dielectric layer; forming a capacitor dielectric layer after formino the first capacitor electrode layer, wherein at least a portion of each of the first capacitor electrode and the capacitor dielectric layer lies within the capacitor cavity; forming a second capacitor electrode layer over the capacitor dielectric layer; and patterning the second capacitor electrode layer to form a second capacitor electrode.
Claim 2
Independent Claim 167 words
A method of forming a semiconductor device, the semiconductor device comprising a substrate, the method comprising: forming a first dielectric layer on the substrate; forming a first capacitor cavity in the first dielectric layer, wherein the substrate has an exposed surface within the capacitor cavity; forming a first capacitor electrode layer over along substantially all the exposed surface of the first dielectric layer; removing a portion of the first capacitor electrode layer to expose the upper surface of the first dielectric layer to form a first capacitor electrode in the capacitor cavity, wherein the first capacitor electrode lies along substantially all the exposed surface of the first dielectric layer; forming a capacitor dielectric layer after formino the first capacitor electrode layer, wherein at least a portion of each of the first capacitor electrode and the capacitor dielectric layer lies within the capacitor cavity; forming a second capacitor electrode layer over the capacitor dielectric layer; and patterning the second capacitor electrode layer to form a second capacitor electrode.
Claim 3
Dependent Claim 58 words
The method of claim 1 , wherein: the method further comprises forming a sacrificial layer over the first capacitor electrode layer prior to removing the portion of the first capacitor electrode layer; and removing the portion of the first capacitor electrode layer is performed by chemical mechanical polishing and removes at least a portion of the sacrificial layer.
Claim 4
Dependent Claim 42 words
The method of claim 1 , further comprising forming a first contact plug in the substrate before forming the first capacitor electrode layer, wherein the first capacitor electrode layer is formed such that it is electrically connected to the first contact plug.
Claim 5
Dependent Claim 59 words
The method of claim 1 , wherein the capacitor dielectric layer comprises a material selected from a group consisting of barium strontium titanate (BST), barium titanate (BTO), strontium titanate (STO), lead titanate (PT), lead zirconate (PZ), lead zirconate titanate (PZT), lead lanthanum zirconate titanate (PLZT). strontium bismuth tantalate (SBT), strontium bismuth niobate (SBN), and strontium bismuth niobate tantalate (SBNT).
Claim 6
Dependent Claim 45 words
The method of claim 1 , further comprises forming a conductive barrier layer along substantiallv all the bottom surface of the capacitor cavity, wherein forming the first capacitor electrode layer deposits the first capacitor electrode layer along an exposed surface of the conductive barrier layer.
Claim 7
Dependent Claim 22 words
The method of claim 1 , wherein removing a portion of the first capacitor electrode layer is performed by chemical mechanical polishing.
Claim 8
Dependent Claim 75 words
A method of claim 1 , where in the first capacitor electrode layer comprises a material selected from the group consisting of rhenium (Re), rhodium (Rh), osmium (Os), iridium (Ir), rhenium oxide (ReO 2 , ReO 3 ), osmium oxide (OsO 2 ), iridium oxide (IrO 2 ), ruthenium (Ru), ruthenium oxide (RuO 2 ), strontium ruthenate (SrRuO 3 ), lanthanum strontium cobalt oxide (LSCO), yttrium barium copper oxide (YBCO), platinum (Pt), and palladium (Pd).
Claim 9
Dependent Claim 23 words
The method of claim 1 , wherein the first and second capacitor electrodes are part of a dynamic random access memory (DRAM) cell.
Claim 10
Dependent Claim 21 words
The method of claim 1 , wherein the capacitor dielectric layer comprises a material having a dielectric constant,k, greater than 100.
Claim 11
Dependent Claim 55 words
The method of claim 1 , further comprising forming a contact plug opening in the substrate, wherein the contact plug opening is within the capacitor cavity, wherein: forming the first capacitor electrode layer deposits the first capacitor electrode layer within the contact plug opening; and the first capacitor electrode layer fills the contact plug opening.
Claim 12
Dependent Claim 60 words
The method of claim 1 , wherein forming the capacitor cavity further comprises forming a via opening in the first dielectric layer, wherein: the via opening is spaced apart from the capacitor cavity; forming the first capacitor electrode layer deposits the first capacitor electrode layer within the via opening; and the first capacitor electrode layer substantially fills the via opening.
Claim 13
Dependent Claim 52 words
The method of claim 1 , further comprising forming a contact plug opening in the substrate, wherein: the capacitor cavity overlies the contact plug opening and the first capacitor electrode layer approximately fills the contact opening; and forming the capacitor cavity further comprises forming a via opening in the first dielectric layer.
Claim 14
Dependent Claim 17 words
The method of claim 1 , further comprising forming an etch-stop layer over the first dielectric layer.
Claim 15
Independent Claim 193 words
A method of forming a capacitor in a semiconductor device, the semiconductor device having a substrate, the method comprising: forming a first dielectric layer along the substrate; forming a capacitor cavity in the first dielectric layer, wherein the substrate has an exposed surface within the capacitor cavity; forming a first capacitor electrode layer along the upper surface of the first dielectric layer and the capacitor cavity, wherein the first capacitor electrode layer fills a first part, but not all, of the capacitor cavity; forming a capacitor dielectric layer over, the first capacitor electrode layer wherein the capacitor dielectric layer fills a second part, but not all, of the capacitor cavity forming a second capacitor electrode layer over the capacitor dielectric layer, wherein the second capacitor electrode layer fills a third part of the capacitor cavity; and removing portions of the first capacitor electrode layer, the capacitor dielectric layer, and the second capacitor electrode layer to expose the upper surface of the first dielectric layer, wherein: a capacitor includes the first capacitor electrode layer, the capacitor dielectric layer, and the second capacitor electrode layer; and substantially all the capacitor lies within the capacitor cavity.
Claim 16
Independent Claim 193 words
A method of forming a capacitor in a semiconductor device, the semiconductor device having a substrate, the method comprising: forming a first dielectric layer along the substrate; forming a capacitor cavity in the first dielectric layer, wherein the substrate has an exposed surface within the capacitor cavity; forming a first capacitor electrode layer along the upper surface of the first dielectric layer and the capacitor cavity, wherein the first capacitor electrode layer fills a first part, but not all, of the capacitor cavity; forming a capacitor dielectric layer over, the first capacitor electrode layer wherein the capacitor dielectric layer fills a second part, but not all, of the capacitor cavity forming a second capacitor electrode layer over the capacitor dielectric layer, wherein the second capacitor electrode layer fills a third part of the capacitor cavity; and removing portions of the first capacitor electrode layer, the capacitor dielectric layer, and the second capacitor electrode layer to expose the upper surface of the first dielectric layer, wherein: a capacitor includes the first capacitor electrode layer, the capacitor dielectric layer, and the second capacitor electrode layer; and substantially all the capacitor lies within the capacitor cavity.
Claim 17
Dependent Claim 42 words
The method of claim 14 , further comprising: forming a second dielectric layer over the capacitor and exposed upper surface of the first dielectric layer; and forming a first contact plug through the second dielectric layer to the second capacitor electrode layer.
Claim 18
Dependent Claim 25 words
The method of claim 15 , further comprising: forming metallic interconnections over the second dielectric layer; and forming a passivation layer over the metallic interconnections.
Claim 19
Dependent Claim 37 words
The method of claim 18 , further comprising forming a sacrificial layer over the second capacitor electrode layer before removing portions of the first capacitor electrode layer, the capacitor dielectric layer, and the second capacitor electrode layer.
Claim 20
Dependent Claim 31 words
The method of claim 14 , wherein removing portions of the first capacitor electrode layer, the capacitor dielectric layer, and the second capacitor electrode layer is performed by chemical mechanical polishing.
Claim 21
Dependent Claim 59 words
The method of claim 14 , wherein the capacitor dielectric layer comprises a material selected from a group consisting of barium strontium titanate (BST), barium titanate (BTO), strontium titanate (STO), lead titanate (PT), lead zirconate (PZ), lead zirconate titanate (PZT), lead lanthanum zirconate titanate (PLZT), strontium bismuth tantalate (SBT), strontium bismuth niobate (SBN), and strontium bismuth niobate tantalate (SBNT).
Claim 22
Dependent Claim 17 words
The method of claim 14 , wherein the first capacitor electrode layer includes a conductive barrier layer.
Claim 23
Dependent Claim 74 words
A method of claim 14 , wherein the first capacitor electrode layer comprises a material selected from the group consisting of rhenium (Re), rhodium (Rh), osmium (Os), iridium (Ir), rhenium oxide (ReO 2 , ReO 3 ), osmium oxide (OsO 2 ), iridium oxide (IrO 2 ), ruthenium (Ru), ruthenium oxide (RuO 2 ), strontium ruthenate (SrRuO 3 ), lanthanum strontium cobalt oxide (LSCO), yttrium barium copper oxide (YBCO), platinum (Pt), and palladium (Pd).
Claim 24
Dependent Claim 18 words
The method of claim 14 , wherein the semiconductor device comprises a dynamic random access memory (DRAM) cell.
Claim 25
Dependent Claim 56 words
The method of claim 14 , further comprising forming a contact plug opening in the substrate, wherein the contact plug opening is within the capacitor cavity, wherein forming the first capacitor electrode layer comprises forming the first capacitor electrode layer within the contact plug opening; and the first capacitor electrode layer fills the contact plug opening.
Claim 26
Dependent Claim 61 words
The method of claim 14 , wherein forming the capacitor cavity further comprises forming a via opening in the first dielectric layer, wherein: the via opening is spaced apart from the capacitor cavity; forming the first capacitor electrode layer comprises forming the first capacitor electrode layer within the via opening; and the first capacitor electrode layer substantially fills the via opening.
Claim 27
Dependent Claim 98 words
The method of claim 14 , further comprising forming a contact plug opening in the substrate, wherein: the first capacitol cavity overlies the contact plug opening; forming the first capacitor electrode layer comprises forming the first capacitor electrode layer within the contact plug opening; the first capacitor electrode layer fills the contact plug opening; forming the capacitor cavity further comprises forming a via opening in the first dielectric layer; and forming the first capacitor electrode layer comprises forming the first capacitor electrode layer within the via opening, wherein the first capacitor electrode layer approximately fills the via opening.
Claim 28
Independent Claim 82 words
A method of forming a semiconductor device comprising: providing a semiconductor substrate; depositing a first dielectric layer on the semiconductor substrate; patterning the first dielectric layer to define a first capacitor cavity; forming a first capacitor electrode overlying the first dielectric layer; forming a capacitor dielectric layer overlying the first capacitor electrode and within the first capacitor cavity; forming a second capacitor electrode overlying the capacitor dielectric layer; and removing portions of the first capacitor electrode before forming the second capacitor electrode.
Claim 29
Independent Claim 82 words
A method of forming a semiconductor device comprising: providing a semiconductor substrate; depositing a first dielectric layer on the semiconductor substrate; patterning the first dielectric layer to define a first capacitor cavity; forming a first capacitor electrode overlying the first dielectric layer; forming a capacitor dielectric layer overlying the first capacitor electrode and within the first capacitor cavity; forming a second capacitor electrode overlying the capacitor dielectric layer; and removing portions of the first capacitor electrode before forming the second capacitor electrode.
Claim 30
Dependent Claim 26 words
The method of claim 26 , wherein at least one of the first capacitor electrode and the second capacitor electrode is formed using an electroplating process.
Claim 31
Dependent Claim 27 words
The method of claim 26 , wherein at least one of the first capacitor electrode and the second capacitor electrode is formed using an electroless plating process.
Claim 32
Dependent Claim 23 words
The method of claim 26 , wherein at least a portion of the second capacitor electrode is formed within the first capacitor cavity.
Claim 33
Dependent Claim 13 words
The method of claim 26 , wherein the first capacitor electrode includes iridium.
Claim 34
Dependent Claim 13 words
The method of claim 26 , wherein the first capacitor electrode includes ruthenium.
Claim 35
Dependent Claim 13 words
The method of claim 26 , wherein the first capacitor electrode includes platinum.
Claim 36
Dependent Claim 14 words
The method of claim 25 , wherein the second capacitor electrode layer includes iridium.
Claim 37
Dependent Claim 14 words
The method of claim 25 , wherein the second capacitor electrode layer includes ruthenium.
Claim 38
Dependent Claim 14 words
The method of claim 25 , wherein the second capacitor electrode layer includes platinum.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2005-02-04 2005-08-06 2006-02-05 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2009-02-04 2009-08-06 2010-02-05 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2013-02-04 2013-08-06 2014-02-05 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag