Methods of forming storage capacitors in integrated circuitry memory cells and integrated circuitry

Abstract

Abstract Methods of forming capacitors and related integrated circuitry are described. In a preferred embodiment, the capacitors form part of a dynamic random access memory (DRAM) cell. According to one aspect of the invention, a first insulating layer is formed over a semiconductive material layer. A conductive gate is formed over the semiconductive material layer. A second insulating layer is formed over the gate and thereafter etched to form a capacitor container. In one implementation, such etch is conducted to outwardly expose the semiconductive material layer. In another implementation, such etch continues into the semiconductive material layer. In yet another implementation, such etch is conducted completely through the semiconductive material layer and into the first insulating layer. In a preferred implementation, a storage capacitor is formed within the capacitor container which extends both elevationally above and elevationally below the gate. According to another aspect of the invention, adjacent word lines are formed over the first insulating layer and source/drain diffusion regions are formed within the semiconductive material laterally outward of the word lines. Respective capacitor containers are etched into the diffusion regions and capacitors are formed within the etched containers. In a preferred implementation, storage node material which constitutes part of the capacitors is in electrical contact with the respective diffusion regions and comprises part of a DRAM memory cell.

Inventors

• 👤 John K. Zahurak

Bibliographic Details