US6072221A
Expired / Lapsed
US
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Semiconductor device having self-aligned contact plug and metallized gate electrode
Assignee: Toshiba Corp
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Filing: 1998-06-26
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Granted: 2000-06-06
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Expires: 2018-06-26
Abstract
Abstract In the method of manufacturing a semiconductor device, according to the present invention, first, a dummy gate electrode consisting of a semiconductor layer and a non-metal cap layer formed on the semiconductor layer, is formed above a substrate. Then, diffusion layers are formed respectively on both sides of the dummy gate electrode. The dummy gate is used as a mask here, and thus the diffusion layers are self-aligned respectively with both sides of the dummy gate electrode. The formation of these diffusion layers requires a high-temperature heat treatment, however since the cap layer is made of a non-metal material, it is not melted down even in the high-temperature heat treatment. Next, the cap layer formed on the semiconductor layer is removed, and a gate groove made by the removal is filled with metal. Thus, a metal gate electrode made of a semiconductor layer and a metal layer is completed. As described above, in the present invention, first, a dummy gate electrode is formed of a non-metal cap layer, and the cap layer is removed after the formation of the diffusion layers, followed by filling the created gate groove with a metal. In this manner, the self-alignment of the diffusion layers and the metallization of the gate electrode can be achieved at the same time.
Inventors
- 👤 Katsuhiko Hieda
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 01:28
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/069; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0223; H10D30/0227; H10D64/00; H10D64/01; H10D64/017; H10D64/20; H10D64/23; H10D64/251; H10D64/258
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
166 words
A semiconductor device comprising: a gate electrode formed above a semiconductor substrate via a gate insulation film, the gate electrode containing a semiconductor layer and a metal layer formed on the semiconductor layer, the metal layer constituting an upper portion of said gate electrode, the semiconductor layer constituting a lower portion of said gate electrode; a side wall insulation film for surrounding a side wall of the gate electrode; an interlayer insulation film formed a predetermined distance away from the side wall insulation film; a diffusion layer formed on a surface portion of the substrate and both sides of the gate electrode; and a contact plug formed on the diffusion layer and between the side wall insulation film and the interlayer insulation film, the contact plug leveled to substantially a same height as the gate electrode and higher than the semiconductor layer, the contact plug including a metal layer, the metal layer of the contact plug formed thicker than the metal layer of the gate electrode.
Claim 2
Dependent Claim
166 words
A semiconductor device comprising: a gate electrode formed above a semiconductor substrate via a gate insulation film, the gate electrode containing a semiconductor layer and a metal layer formed on the semiconductor layer, the metal layer constituting an upper portion of said gate electrode, the semiconductor layer constituting a lower portion of said gate electrode; a side wall insulation film for surrounding a side wall of the gate electrode; an interlayer insulation film formed a predetermined distance away from the side wall insulation film; a diffusion layer formed on a surface portion of the substrate and both sides of the gate electrode; and a contact plug formed on the diffusion layer and between the side wall insulation film and the interlayer insulation film, the contact plug leveled to substantially a same height as the gate electrode and higher than the semiconductor layer, the contact plug including a metal layer, the metal layer of the contact plug formed thicker than the metal layer of the gate electrode.
Claim 3
Dependent Claim
28 words
A semiconductor device according to claim 1, further comprising the side wall insulation film, the interlayer insulation film, and the gate electrode leveled to substantially a same height.
Claim 4
Dependent Claim
34 words
A semiconductor device according to claim 1, wherein a surface portion of the contact plug is made of a metal layer made of a same material as a metal layer of the gate electrode.
Claim 5
Dependent Claim
22 words
A semiconductor device according to claim 1, wherein the metal layer of the contact plug reaches a surface of the semiconductor substrate.
Claim 6
Dependent Claim
23 words
A semiconductor device according to claim 1, wherein the metal layer of the contact plug includes a TiN layer and a W layer.
Claim 7
Dependent Claim
23 words
A semiconductor device according to claim 1, further comprising an SiN layer surrounding a lower side surface of the side wall insulation film.
Claim 8
Dependent Claim
161 words
A semiconductor device comprising: a gate electrode formed above a semiconductor substrate via a gate insulation film, the sate electrode containing a semiconductor layer and a metal layer formed on the semiconductor layer, the metal layer constituting an upper portion of said gate electrode, the semiconductor layer constituting a lower portion of said gate electrode; a side wall insulation film for surrounding a side wall of the gate electrode; an interlayer insulation film formed a predetermined distance away from the side wall insulation film; a diffusion layer formed on a surface portion of the substrate and both sides of the gate electrode; a contact plug formed on the diffusion layer and between the side wall insulation film and the interlayer insulation film, the contact plug leveled to substantially a same height as the gate electrode; and a contact which contacts a part of an upper surface of the contact plug and a part of a lateral surface of the contact plug.
Claim 9
Dependent Claim
161 words
A semiconductor device comprising: a gate electrode formed above a semiconductor substrate via a gate insulation film, the sate electrode containing a semiconductor layer and a metal layer formed on the semiconductor layer, the metal layer constituting an upper portion of said gate electrode, the semiconductor layer constituting a lower portion of said gate electrode; a side wall insulation film for surrounding a side wall of the gate electrode; an interlayer insulation film formed a predetermined distance away from the side wall insulation film; a diffusion layer formed on a surface portion of the substrate and both sides of the gate electrode; a contact plug formed on the diffusion layer and between the side wall insulation film and the interlayer insulation film, the contact plug leveled to substantially a same height as the gate electrode; and a contact which contacts a part of an upper surface of the contact plug and a part of a lateral surface of the contact plug.
Claim 10
Dependent Claim
29 words
A semiconductor device according to claim 7, further comprising the side wall insulation film and the interlayer insulation film, and the gate electrode leveled to substantially a same height.
Claim 11
Dependent Claim
49 words
A semiconductor device according to claim 7, wherein said gate electrode is formed of a metal layer disposed on a semiconductor layer and a surface portion of the contact plug is made of a metal layer made of a same material as the metal layer of the gate electrode.
Claim 12
Dependent Claim
23 words
A semiconductor device according to claim 7, further comprising an SiN layer surrounding a lower side surface of the side wall insulation film.
Claim 13
Dependent Claim
191 words
A semiconductor device comprising: a gate electrode formed above a semiconductor substrate via a gate insulation film, the gate electrode containing a semiconductor layer and a metal layer formed on the semiconductor layer, the metal layer constituting an upper portion of said gate electrode, the semiconductor layer constituting a lower portion of said gate electrode; a side wall insulation film for surrounding a side wall of the gate electrode; an interlayer insulation film formed a predetermined distance away from the side wall insulation film; a diffusion layer formed on a surface portion of the substrate and both sides of the gate electrode; and a contact plug formed on the diffusion layer and between the side wall insulation film and the interlayer insulation film, the contact plug leveled to substantially a same height as the gate electrode and higher than semiconductor layer, the contact plug including a metal layer, the metal layer of the contact plug formed thicker than the metal layer of the gate electrode; and a contact which contacts a part of an upper surface of the contact plug and a part of a lateral surface of the contact plug.
Claim 14
Dependent Claim
191 words
A semiconductor device comprising: a gate electrode formed above a semiconductor substrate via a gate insulation film, the gate electrode containing a semiconductor layer and a metal layer formed on the semiconductor layer, the metal layer constituting an upper portion of said gate electrode, the semiconductor layer constituting a lower portion of said gate electrode; a side wall insulation film for surrounding a side wall of the gate electrode; an interlayer insulation film formed a predetermined distance away from the side wall insulation film; a diffusion layer formed on a surface portion of the substrate and both sides of the gate electrode; and a contact plug formed on the diffusion layer and between the side wall insulation film and the interlayer insulation film, the contact plug leveled to substantially a same height as the gate electrode and higher than semiconductor layer, the contact plug including a metal layer, the metal layer of the contact plug formed thicker than the metal layer of the gate electrode; and a contact which contacts a part of an upper surface of the contact plug and a part of a lateral surface of the contact plug.
Claim 15
Dependent Claim
23 words
A semiconductor device according to claim 11, further comprising an SiN layer surrounding a lower side surface of the side wall insulation film.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-06-06 | 2003-12-06 | 2004-06-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-06-06 | 2007-12-06 | 2008-06-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-06-06 | 2011-12-06 | 2012-06-06 | $7700.00 | Window Closed / Lapsed |