Method of forming capacitor while protecting dielectric from etchants

Claim 1

A method of forming a capacitor in an integrated circuits, the method comprising the steps of: forming a bottom electrode in electrical contact with a circuit node of the integrated circuit; forming an insulating layer over the bottom electrode; forming a contact via through the insulating layer to at least partially expose the bottom electrode; depositing a dielectric material into the contact via to at least completely fill the contact via; and forming a top electrode over the dielectric material, wherein the dielectric material is characterized by a dielectric constant of greater than 100, the dielectric material comprises a form of strontium bismuth tantalate, the dielectric deposition step comprises a spin-on deposition conducted at a rotation rate of between 500 and 5,000 rpm with a dielectric material solution having a molarity between 0.1 and 0.3 molar in a xylene solvent, and the deposited dielectric material has a thickness between about 500 and 5,000 Å, and the dielectric material overflows the contact via to produce an overflow portion having a thickness of between about 0 and 1,000 Å.

Claim 2

A method of forming a capacitor in an integrated circuits, the method comprising the steps of: forming a bottom electrode in electrical contact with a circuit node of the integrated circuit; forming an insulating layer over the bottom electrode; forming a contact via through the insulating layer to at least partially expose the bottom electrode; depositing a dielectric material into the contact via to at least completely fill the contact via; and forming a top electrode over the dielectric material, wherein the dielectric material is characterized by a dielectric constant of greater than 100, the dielectric material comprises a form of strontium bismuth tantalate, the dielectric deposition step comprises a spin-on deposition conducted at a rotation rate of between 500 and 5,000 rpm with a dielectric material solution having a molarity between 0.1 and 0.3 molar in a xylene solvent, and the deposited dielectric material has a thickness between about 500 and 5,000 Å, and the dielectric material overflows the contact via to produce an overflow portion having a thickness of between about 0 and 1,000 Å.

Claim 7

A method of forming a capacitor in an integrated circuit, the method comprising the steps of: forming a contact via through a planarized insulating layer, the contact via having a bottom surface comprising an exposed upper surface of a bottom electrode; depositing a dielectric layer into the contact via to contact the bottom electrode and at least completely fill the contact via; depositing a top conductive layer over and directly contacting the dielectric layer within the contact via; and patterning the top conductive layer, wherein the patterning step comprises masking a portion of the top conductive layer overlying the contact via and etching with an ion milling process, and the ion milling process etches both the top conductive layer and a portion of the dielectric layer outside of the contact via.

Claim 8

A method of forming a capacitor in an integrated circuit, the method comprising the steps of: forming a contact via through a planarized insulating layer, the contact via having a bottom surface comprising an exposed upper surface of a bottom electrode; depositing a dielectric layer into the contact via to contact the bottom electrode and at least completely fill the contact via; depositing a top conductive layer over and directly contacting the dielectric layer within the contact via; and patterning the top conductive layer, wherein the patterning step comprises masking a portion of the top conductive layer overlying the contact via and etching with an ion milling process, and the ion milling process etches both the top conductive layer and a portion of the dielectric layer outside of the contact via.