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US4890191A
Expired / Lapsed
US
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Integrated circuits
Assignee: STC PLC
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Filing: 1989-01-31
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Granted: 1989-12-26
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Expires: 2009-01-31
Abstract
Abstract In a semi-custom integrated circuit, e.g. a bipolar analogue array, underpass areas are so configured as to permit operation as capacitors by suitable configuration of a user determined interconnection pattern. Typically each underpass comprises a highly doped region disposed over a buried layer. A thin oxide layer is applied to the surface of the underpass. Suitable configuration of polysilicon and metal masks provides either a cross-over or a capacitor.
Inventors
- 👤 George H. S. Rokos
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 13:46
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/20; H10D; H10D84/00; H10D84/90; H10D84/901
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
187 words
In an integrated circuitg a conductor cross-over structure including: (a) a p - -type silicon substrate; (b) an n - -type epitaxial layer disposed on the substrate; (c) a buried n - -type region extending through the epitaxial layer and the substrate; (d) an n + -type region extending through the epitaxial layer and providing electrical contact to the buried layer; (e) an oxide layer disposed on the epitaxial layer having spaced openings each exposing a portion of the n + -type region; (f) a polysilicon layer applied to the oxide layer and contacting the n + -type region via the windows; (g) an insulator layer applied to a polysilicon layer and having spaced openings each exposing a portion of the polysilicon layer; and (h) a patterned metallisation layer providing a conductor track and contacts to the polysilicon layer via said openings in the insulator layer; wherein said conductor track provides a first current path of the cross-over, and wherein the parallel combination of the polysilicon layer, the n + -type region and the n + -type buried layer provides a second current path of the cross-over.
Claim 2
Dependent Claim
187 words
In an integrated circuitg a conductor cross-over structure including: (a) a p - -type silicon substrate; (b) an n - -type epitaxial layer disposed on the substrate; (c) a buried n - -type region extending through the epitaxial layer and the substrate; (d) an n + -type region extending through the epitaxial layer and providing electrical contact to the buried layer; (e) an oxide layer disposed on the epitaxial layer having spaced openings each exposing a portion of the n + -type region; (f) a polysilicon layer applied to the oxide layer and contacting the n + -type region via the windows; (g) an insulator layer applied to a polysilicon layer and having spaced openings each exposing a portion of the polysilicon layer; and (h) a patterned metallisation layer providing a conductor track and contacts to the polysilicon layer via said openings in the insulator layer; wherein said conductor track provides a first current path of the cross-over, and wherein the parallel combination of the polysilicon layer, the n + -type region and the n + -type buried layer provides a second current path of the cross-over.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-12-25 | 1993-06-26 | 1993-12-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-12-25 | 1997-06-26 | 1997-12-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-12-25 | 2001-06-26 | 2001-12-26 | $7700.00 | Window Closed / Lapsed |