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US4481283A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of manufacturing an integrated capacitor and device obtained by this method

Assignee: US Philips Corp
•
Filing: 1983-03-28
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Granted: 1984-11-06
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Expires: 2003-03-28
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Abstract

Abstract A method of manufacturing integrated capacitors in a semiconductor body coated with a multilayer wiring network constituted by two patterns which are separated by insulating layers, in which method on a first insulating layer is deposited a metal layer from which a dense layer is formed by anodic oxidation, which layer is then subjected to a photo-etching treatment in order to form a dielectric of a capacitor, whose plates consist of parts of a second conductor pattern.

Inventors

  • 👤 George Kerr
  • 👤 Yves Meheust

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 08:11
CPC Classifications
H; H10; H10D; H10D1/00; H10D1/60; H10D1/68; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/064; H10W20/065

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 303 words
A method of manufacturing a semiconductor device having a semiconductor body which at a surface is provided with circuit elements and a multilayer wiring structure, in which the surface of the semiconductor body is coated with a first layer of insulating material on which there is formed from a metal layer deposited on the insulating material a first conductor pattern which contacts the semiconductor body at the area of contact holes in the first layer of insulating material and comprises at least one plate of a capacitor, after which a second conductor pattern is applied which comprises a second plate of the capacitor and is separated therefrom by a dielectric obtained by anodic oxidation from the metal layer deposited on the first layer of insulating material, characterized in that, after the first layer of insulating material has been provided with contact windows, the metal layer is deposited on the whole surface of the semiconductor body and is converted over a pair of its thickness by anodic oxidation into a second insulating layer of metal oxide, after which the double layer of metal and metal oxide is patterned photolithographically and the assembly is then coated with a third layer of insulating material, which at the area of the second plate of the capacitor and of connections between the two conductor patterns is provided with apertures, the metal oxide formed further being removed at the area of the connections, after which a layer of conductive material is applied, from which the second conductor pattern is formed photolithographically, which at the area of the connections contacts the first conductor pattern and which comprises the second plate of the capacitor, which is separated from the first plate by a part of the layer of metal oxide which is grown by anodic oxidation and serves as a dielectric.
Claim 2
Independent Claim 303 words
A method of manufacturing a semiconductor device having a semiconductor body which at a surface is provided with circuit elements and a multilayer wiring structure, in which the surface of the semiconductor body is coated with a first layer of insulating material on which there is formed from a metal layer deposited on the insulating material a first conductor pattern which contacts the semiconductor body at the area of contact holes in the first layer of insulating material and comprises at least one plate of a capacitor, after which a second conductor pattern is applied which comprises a second plate of the capacitor and is separated therefrom by a dielectric obtained by anodic oxidation from the metal layer deposited on the first layer of insulating material, characterized in that, after the first layer of insulating material has been provided with contact windows, the metal layer is deposited on the whole surface of the semiconductor body and is converted over a pair of its thickness by anodic oxidation into a second insulating layer of metal oxide, after which the double layer of metal and metal oxide is patterned photolithographically and the assembly is then coated with a third layer of insulating material, which at the area of the second plate of the capacitor and of connections between the two conductor patterns is provided with apertures, the metal oxide formed further being removed at the area of the connections, after which a layer of conductive material is applied, from which the second conductor pattern is formed photolithographically, which at the area of the connections contacts the first conductor pattern and which comprises the second plate of the capacitor, which is separated from the first plate by a part of the layer of metal oxide which is grown by anodic oxidation and serves as a dielectric.
Claim 3
Dependent Claim 25 words
A method as claimed in claim 1, characterized in that the two conductor patterns are formed from aluminum and the dielectric consists of aluminum oxide.
Claim 4
Dependent Claim 13 words
A semiconductor device manufactured by means of the method claimed in claim 1.
Claim 5
Dependent Claim 13 words
A semiconductor device manufactured by means of the method claimed in claim 2.

References Cited (Backward Citations)

GB907666A Cited
DE1920684A1 Cited
US3739239A Cited
US3839164A Cited
US3864817A Cited
JPS54158884A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1987-11-06 1988-05-07 1988-11-06 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1991-11-06 1992-05-07 1992-11-06 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1995-11-06 1996-05-07 1996-11-06 $7700.00 Window Closed / Lapsed

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