US5843842A
Expired / Lapsed
US
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Method for manufacturing a semiconductor device having a wiring layer without producing silicon precipitates
Assignee: Samsung Electronics Co Ltd
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Filing: 1996-09-03
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Granted: 1998-12-01
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Expires: 2016-09-03
Abstract
Abstract A wiring layer of a semiconductor device having a novel contact structure is disclosed. The semiconductor device includes a semiconductor substrate, an insulating layer having an opening (contact hole) and a first conductive layer formed on the insulating layer which completely fills the opening. The first conductive layer does not produce any Si precipitates in a subsequent heat-treating step for filling the opening with the first conductive layer material. The semiconductor device may further include a second conductive layer having a planarized surface on the first conductive layer. This improves subsequent photolithography. An anti-reflective layer may be formed on the second conductive layer for preventing an unwanted reflection during a photo lithography process. The semiconductor device preferably includes a diffusion barrier layer under the first conductive layer and on the semiconductor substrate, on the insulating layer, and on the inner surface of the opening which prevents a reaction between the first conductive layer and the semiconductor substrate or the insulating layer. A method for forming the wiring layer is also disclosed. Providing a semiconductor device with the wiring layer reduces the leakage current by preventing Al spiking. Since the first conductive layer undergoes a heat-treatment step at a temperature below the melting point, while flowing into the opening and completely filling it with the first conductive layer material, no void is formed in the opening. Good semiconductor device reliability is ensured in spite of the contact hole being less than 1 mu m in size and having an aspect ratio greater than 1.0.
Inventors
- 👤 Sang-in Lee
- 👤 Jeong-in Hong
- 👤 Jong-Ho Park
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 09:39
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/032; H10W20/033; H10D; H10D64/00; H10D64/01; H10D64/011; H10D64/0111; H10P; H10P76/00; H10P76/20; H10P76/204; H10P76/2041; H10P76/2043; H10W20/047; H10W20/049; H10W20/052; H10W20/0526; H10W20/056; H10W20/057; H10W20/059; H10W20/063; H10W20/0633; H10W20/064; H10W20/066; H10W20/40; H10W20/41; H10W20/425; H10W20/44; H10W20/4403; H10W20/4405; H10W20/4451
Claims Analysis
Total Claims: 35
Claim 1
Independent Claim
169 words
A method for manufacturing a semiconductor device including a wiring layer, comprising the steps of: forming an insulating layer on a major surface of a semiconductor substrate; forming an opening in said insulating layer, said opening exposing a portion of said major surface of said semiconductor substrate; forming a first metal layer on an inner surface of said opening, on said insulating layer, and on said exposed portion of said major surface of said semiconductor substrate, said first metal layer being comprised of an aluminum alloy having a Si component; forming a second metal layer on said first metal layer, said second metal layer being comprised of a metal selected from a group consisting of pure aluminum, an Al alloy having no Si component, and an Al alloy having not more than 0.5% by weight of a Si component, said first and second metal layers together comprising a first conductive layer; heat-treating said first conductive layer in a vacuum such that said first conductive layer completely fills said opening.
Claim 2
Independent Claim
169 words
A method for manufacturing a semiconductor device including a wiring layer, comprising the steps of: forming an insulating layer on a major surface of a semiconductor substrate; forming an opening in said insulating layer, said opening exposing a portion of said major surface of said semiconductor substrate; forming a first metal layer on an inner surface of said opening, on said insulating layer, and on said exposed portion of said major surface of said semiconductor substrate, said first metal layer being comprised of an aluminum alloy having a Si component; forming a second metal layer on said first metal layer, said second metal layer being comprised of a metal selected from a group consisting of pure aluminum, an Al alloy having no Si component, and an Al alloy having not more than 0.5% by weight of a Si component, said first and second metal layers together comprising a first conductive layer; heat-treating said first conductive layer in a vacuum such that said first conductive layer completely fills said opening.
Claim 3
Dependent Claim
35 words
The method as set forth in claim 1, wherein said metal of said second metal layer is selected from a group consisting of pure aluminum, an Al--Cu alloy, an Al--Ti alloy, and an Al--Cu--Si alloy.
Claim 4
Dependent Claim
35 words
The method as set forth in claim 2, wherein said aluminum alloy having a Si component of said first metal layer is selected from a group consisting of an Al--Si alloy and an Al--Cu--Si alloy.
Claim 5
Dependent Claim
35 words
The method as set forth in claim 1, wherein said aluminum alloy having a Si component of said first metal layer is selected from a group consisting of an Al--Si alloy and an Al--Cu--Si alloy.
Claim 6
Dependent Claim
22 words
The method as set forth in claim 1, wherein said heat-treating step is carried out at a temperature of 500° C.-550° C.
Claim 7
Dependent Claim
23 words
The method as set forth in claim 5, wherein said heat-treating step is carried out for 1-5 minutes, using an Ar conduction method.
Claim 8
Dependent Claim
34 words
The method as set forth in claim 1, further comprising the step of heat-treating said second conductive layer in such a manner as to planarize an upper major surface of said second conductive layer.
Claim 9
Dependent Claim
22 words
The method as set forth in claim 7, wherein said second conductive layer is comprised of a metal having no Si component.
Claim 10
Dependent Claim
28 words
The method as set forth in claim 8, wherein said metal of said second conductive layer is selected from a group consisting of pure aluminum and Al alloys.
Claim 11
Dependent Claim
35 words
The method as set forth in claim 9, wherein said metal of said second metal layer is selected from a group consisting of pure aluminum, an Al--Cu alloy, an Al--Ti alloy, and an Al--Cu--Si alloy.
Claim 12
Dependent Claim
35 words
The method as set forth in claim 10, wherein said aluminum alloy having a Si component of said first metal layer is selected from a group consisting of an Al--Si alloy and an Al--Cu--Si alloy.
Claim 13
Dependent Claim
24 words
The method as set forth in claim 11, wherein said first conductive layer does not form Si precipitates upon cooling following said heat-treating step.
Claim 14
Dependent Claim
51 words
The method as set forth in claim 8, further comprising the step of, prior to said forming a first metal layer step, forming a diffusion barrier layer on said inner surface of said opening, on said insulating layer, and on said exposed portion of said major surface of said semiconductor substrate.
Claim 15
Dependent Claim
30 words
The method as set forth in claim 13, wherein said diffusion barrier layer is comprised of a material selected from a group consisting of transition metals and transition metal compounds.
Claim 16
Dependent Claim
24 words
The method as set forth in claim 14, wherein said first conductive layer does not form Si precipitates upon cooling following said heat-treating step.
Claim 17
Dependent Claim
51 words
The method as set forth in claim 1, further comprising the step of, prior to said forming a first metal layer step, forming a diffusion barrier layer on said inner surface of said opening, on said insulating layer, and on said exposed portion of said major surface of said semiconductor substrate.
Claim 18
Dependent Claim
30 words
The method as set forth in claim 16, wherein said diffusion barrier layer is comprised of a material selected from a group consisting of transition metals and transition metal compounds.
Claim 19
Dependent Claim
24 words
The method as set forth in claim 1, wherein said first conductive layer does not form Si precipitates upon cooling following said heat-treating step.
Claim 20
Dependent Claim
63 words
The method as set forth in claim 1, wherein said first conductive layer and said second conductive layer together comprise said wiring layer, and, wherein further, said first metal layer has a thickness not more than one-quarter of a thickness of said wiring layer, and said second metal layer has a thickness not less than five-twelfths of the thickness of said wiring layer.
Claim 21
Dependent Claim
28 words
The method as set forth in claim 1, wherein said first conductive layer has a thickness of about one-third to two-thirds of a thickness of said wiring layer.
Claim 22
Dependent Claim
30 words
The method as set forth in claim 1, wherein said step of heat treating is followed by the step of forming a second conductive layer on said first conductive layer.
Claim 23
Independent Claim
180 words
A method for manufacturing a semiconductor device including a wiring layer, comprising the steps of: forming an insulating layer on a major surface of a semiconductor substrate; forming an opening in said insulating layer, said opening exposing a portion of said major surface of said semiconductor substrate; forming a diffusion barrier layer on an inner surface of said opening, on said insulating layer, and on said exposed portion of said major surface of said semiconductor substrate; forming a first metal layer on said diffusion barrier layer, said first metal layer being comprised of an aluminum alloy having a Si component; forming a second metal layer on said first metal layer, said second metal layer being comprised of a metal selected from a group consisting of pure aluminum, an Al alloy having no Si component, an Al alloy having not more than 0.5% by weight of a Si component, said first and second metal layers together comprising a firs t conductive layer; heat treating said first conductive layer in a vacuum such that said first conductive layer completely fills said opening.
Claim 24
Independent Claim
180 words
A method for manufacturing a semiconductor device including a wiring layer, comprising the steps of: forming an insulating layer on a major surface of a semiconductor substrate; forming an opening in said insulating layer, said opening exposing a portion of said major surface of said semiconductor substrate; forming a diffusion barrier layer on an inner surface of said opening, on said insulating layer, and on said exposed portion of said major surface of said semiconductor substrate; forming a first metal layer on said diffusion barrier layer, said first metal layer being comprised of an aluminum alloy having a Si component; forming a second metal layer on said first metal layer, said second metal layer being comprised of a metal selected from a group consisting of pure aluminum, an Al alloy having no Si component, an Al alloy having not more than 0.5% by weight of a Si component, said first and second metal layers together comprising a firs t conductive layer; heat treating said first conductive layer in a vacuum such that said first conductive layer completely fills said opening.
Claim 25
Dependent Claim
30 words
The method as set forth in claim 22, wherein said diffusion barrier layer is comprised of a material selected from a group consisting of transition metals and transition metal compounds.
Claim 26
Dependent Claim
35 words
The method as set forth in claim 23, wherein said aluminum alloy having a Si component of said first metal layer is selected from a group consisting of an Al--Si alloy and an Al--Cu--Si alloy.
Claim 27
Dependent Claim
35 words
The method as set forth in claim 24, wherein said metal of said second metal layer is selected from a group consisting of pure aluminum, an Al--Cu alloy, an Al--Ti alloy, and an Al--Cu--Si alloy.
Claim 28
Dependent Claim
34 words
The method as set forth in claim 22, further comprising the step of heat-treating said second conductive layer in such a manner as to planarize an upper major surface of said second conductive layer.
Claim 29
Dependent Claim
22 words
The method as set forth in claim 26, wherein said second conductive layer is comprised of a metal having no Si component.
Claim 30
Dependent Claim
24 words
The method as set forth in claim 26, wherein said first conductive layer does not form Si precipitates upon cooling following said heat-treating step.
Claim 31
Dependent Claim
30 words
The method as set forth in claim 22, wherein said step of heat treating is followed by the step of forming a second conductive layer on said first conductive layer.
Claim 32
Independent Claim
228 words
A method for manufacturing a semiconductor device including a wiring layer, comprising the steps of: forming an insulating layer on a major surface of a semiconductor substrate; forming an opening in said insulating layer, said opening exposing a portion of said major surface of said semiconductor substrate; forming a first metal layer on an inner surface of said opening, on said insulating layer, and on said exposed portion of said major surface of said semiconductor substrate, said first metal layer being comprised of an aluminum alloy having a Si component; forming a second metal layer on said first metal layer, said second metal layer being comprised of a metal selected from a group consisting of pure aluminum, an Al alloy having no Si component, and an Al alloy having not more than 0.5% by weight of a Si component, said first and second metal layers together comprising a first conductive layer; heat-treating said first conductive layer such that said first conductive layer fills said opening; and forming a second conductive layer on said first conductive layer, wherein said first conductive layer and said second conductive layer together comprise a wiring layer, said first metal layer has a thickness not more than one-quarter of a thickness of said wiring layer, and said second metal layer has a thickness not less than five-twelfths of the thickness of said wiring layer.
Claim 33
Independent Claim
228 words
A method for manufacturing a semiconductor device including a wiring layer, comprising the steps of: forming an insulating layer on a major surface of a semiconductor substrate; forming an opening in said insulating layer, said opening exposing a portion of said major surface of said semiconductor substrate; forming a first metal layer on an inner surface of said opening, on said insulating layer, and on said exposed portion of said major surface of said semiconductor substrate, said first metal layer being comprised of an aluminum alloy having a Si component; forming a second metal layer on said first metal layer, said second metal layer being comprised of a metal selected from a group consisting of pure aluminum, an Al alloy having no Si component, and an Al alloy having not more than 0.5% by weight of a Si component, said first and second metal layers together comprising a first conductive layer; heat-treating said first conductive layer such that said first conductive layer fills said opening; and forming a second conductive layer on said first conductive layer, wherein said first conductive layer and said second conductive layer together comprise a wiring layer, said first metal layer has a thickness not more than one-quarter of a thickness of said wiring layer, and said second metal layer has a thickness not less than five-twelfths of the thickness of said wiring layer.
Claim 34
Independent Claim
210 words
A method for manufacturing a semiconductor device including a wiring layer, comprising the steps of: forming an insulating layer on a major surface of a semiconductor substrate; forming an opening in said insulating layer, said opening exposing a portion of said major surface of said semiconductor substrate; forming a first metal layer on an inner surface of said opening, on said insulating layer, and on said exposed portion of said major surface of said semiconductor substrate, said first metal layer being comprised of an aluminum alloy having a Si component; forming a second metal layer on said first metal layer, said second metal layer being comprised of a metal selected from a group consisting of pure aluminum, an Al alloy having no Si component, and an Al alloy having not more than 0.5% by weight of a Si component, said first and second metal layers together comprising a first conductive layer; heat-treating said first conductive layer such that said first conductive layer fills said opening; and forming a second conductive layer on said first conductive layer; wherein said first conductive and said second conductive layers together comprise a wiring layer, and said first conductive layer has a thickness of about one-third to two-thirds of a thickness of said wiring layer.
Claim 35
Independent Claim
210 words
A method for manufacturing a semiconductor device including a wiring layer, comprising the steps of: forming an insulating layer on a major surface of a semiconductor substrate; forming an opening in said insulating layer, said opening exposing a portion of said major surface of said semiconductor substrate; forming a first metal layer on an inner surface of said opening, on said insulating layer, and on said exposed portion of said major surface of said semiconductor substrate, said first metal layer being comprised of an aluminum alloy having a Si component; forming a second metal layer on said first metal layer, said second metal layer being comprised of a metal selected from a group consisting of pure aluminum, an Al alloy having no Si component, and an Al alloy having not more than 0.5% by weight of a Si component, said first and second metal layers together comprising a first conductive layer; heat-treating said first conductive layer such that said first conductive layer fills said opening; and forming a second conductive layer on said first conductive layer; wherein said first conductive and said second conductive layers together comprise a wiring layer, and said first conductive layer has a thickness of about one-third to two-thirds of a thickness of said wiring layer.
References Cited (Backward Citations)
US4502210A
Cited
US4538344A
Cited
US4672740A
Cited
JPS6068614A
Cited
US4720908A
Cited
EP0273715A2
Cited
US4878105A
Cited
JPH01280335A
Cited
US5260604A
Cited
JPH02159065A
Cited
US5006484A
Cited
US4997518A
Cited
US4992152A
Cited
JPH02310919A
Cited
US5019533A
Cited
US4970176A
Cited
US4999160A
Cited
US5108951A
Cited
US5266521A
Cited
US5266524A
Cited
US5561083A
Cited
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