US5811869A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Laser antifuse using gate capacitor
Assignee: Micron Technology Inc
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Filing: 1996-01-04
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Granted: 1998-09-22
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Expires: 2016-01-04
Abstract
Abstract An integrated circuit laser antifuse is described which has two physical states. In the first physical state the laser antifuse has to conductive plates electrically separated by a layer of dielectric material. In the second physical state the two conductive plates are electrically connected through the dielectric in response to an external radiation source, such as a laser.
Inventors
- 👤 Mirmajid Seyyedy
- 👤 Manny K. F. Ma
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 18:28
CPC Classifications
G; G11; G11C; G11C17/00; G11C17/14; G11C17/16; H; H10; H10W; H10W20/00; H10W20/40; H10W20/49; H10W20/491; H10W20/492
Claims Analysis
Total Claims: 21
Claim 1
Independent Claim
106 words
A laser antifuse, having first and second physical states, fabricated in an integrated circuit, the laser antifuse comprising: a first conductive plate; a second conductive plate; and a layer of BaSrTiO 3 dielectric material located between the first conductive plate and the second conductive plate, wherein the first conductive plate and the second conductive plate are electrically isolated by the layer of BaSrTiO 3 dielectric material in the first physical state, and wherein the first conductive plate and the second conductive plate are electrically connected through the layer of BaSrTiO 3 dielectric material in the second physical state in response to a focused external radiation source.
Claim 2
Dependent Claim
106 words
A laser antifuse, having first and second physical states, fabricated in an integrated circuit, the laser antifuse comprising: a first conductive plate; a second conductive plate; and a layer of BaSrTiO 3 dielectric material located between the first conductive plate and the second conductive plate, wherein the first conductive plate and the second conductive plate are electrically isolated by the layer of BaSrTiO 3 dielectric material in the first physical state, and wherein the first conductive plate and the second conductive plate are electrically connected through the layer of BaSrTiO 3 dielectric material in the second physical state in response to a focused external radiation source.
Claim 3
Dependent Claim
23 words
The laser antifuse of claim 1 wherein the first conductive plate comprises: a layer of polysilicon fabricated on the layer of dielectric material.
Claim 4
Dependent Claim
22 words
The laser antifuse of claim 1 wherein the second conductive plate comprises: an N-well fabricated in a P-substrate of the integrated circuit.
Claim 5
Dependent Claim
21 words
The laser antifuse of claim 3 wherein the second conductive plate further comprises: an N+ contact region fabricated in the N-well.
Claim 6
Dependent Claim
22 words
The laser antifuse of claim 1 wherein the second conductive plate comprises: a P-well fabricated in an N-substrate of the integrated circuit.
Claim 7
Dependent Claim
21 words
The laser antifuse of claim 5 wherein the second conductive plate further comprises: a P+ contact region fabricated in the P-well.
Claim 8
Dependent Claim
15 words
The laser antifuse of claim 1 wherein the focused external radiation source comprises a laser.
Claim 9
Dependent Claim
15 words
The laser antifuse of claim 1 wherein the dielectric material is a layer of oxide.
Claim 10
Dependent Claim
17 words
The laser antifuse of claim 1 wherein the integrated circuit is a dynamic random access memory (DRAM).
Claim 11
Dependent Claim
132 words
A laser antifuse, having first and second physical states, fabricated in an integrated memory circuit, the laser antifuse comprising: a first conductive plate, the first conductive plate being a layer of polysilicon; a second conductive plate, the second conductive plate being a well fabricated in a substrate of the integrated memory circuit; and a layer of BaSrTiO 3 dielectric material located between the first conductive plate and the second conductive plate, wherein the first conductive plate and the second conductive plate are electrically isolated by the layer of BaSrTiO 3 dielectric material in the first physical state, and wherein the first conductive plate and the second conductive plate are electrically connected through the layer of BaSrTiO 3 dielectric material in the second physical state in response to a focused external radiation source.
Claim 12
Dependent Claim
132 words
A laser antifuse, having first and second physical states, fabricated in an integrated memory circuit, the laser antifuse comprising: a first conductive plate, the first conductive plate being a layer of polysilicon; a second conductive plate, the second conductive plate being a well fabricated in a substrate of the integrated memory circuit; and a layer of BaSrTiO 3 dielectric material located between the first conductive plate and the second conductive plate, wherein the first conductive plate and the second conductive plate are electrically isolated by the layer of BaSrTiO 3 dielectric material in the first physical state, and wherein the first conductive plate and the second conductive plate are electrically connected through the layer of BaSrTiO 3 dielectric material in the second physical state in response to a focused external radiation source.
Claim 13
Dependent Claim
18 words
The laser antifuse of claim 10 wherein the integrated memory circuit is a dynamic random access memory (DRAM).
Claim 14
Dependent Claim
22 words
The laser antifuse of claim 10 wherein the second conductive plate comprises: an N-well fabricated in a P-substrate of the integrated circuit.
Claim 15
Dependent Claim
23 words
The laser antifuse of claim 10 wherein the second conductive plate comprises: a P-well fabricated in an N-substrate of the integrated memory circuit.
Claim 16
Dependent Claim
15 words
The laser antifuse of claim 10 wherein the focused external radiation source comprises a laser.
Claim 17
Independent Claim
110 words
A method of programming a laser antifuse, the method comprising the steps of: fabricating an integrated circuit having a laser antifuse, the laser antifuse comprising, a first conductive plate, a second conductive plate, and a layer of BaSrTiO 3 dielectric material located between the first conductive plate and the second conductive plate, wherein the first conductive plate and the second conductive plate are electrically isolated by the layer of BaSrTiO 3 dielectric; and electrically connecting the first conductive plate and the second conductive plate by focussing an external radiation source on the first conductive plate such that a conductive path is formed through the layer of BaSrTiO 3 dielectric material.
Claim 18
Independent Claim
110 words
A method of programming a laser antifuse, the method comprising the steps of: fabricating an integrated circuit having a laser antifuse, the laser antifuse comprising, a first conductive plate, a second conductive plate, and a layer of BaSrTiO 3 dielectric material located between the first conductive plate and the second conductive plate, wherein the first conductive plate and the second conductive plate are electrically isolated by the layer of BaSrTiO 3 dielectric; and electrically connecting the first conductive plate and the second conductive plate by focussing an external radiation source on the first conductive plate such that a conductive path is formed through the layer of BaSrTiO 3 dielectric material.
Claim 19
Dependent Claim
13 words
The method of claim 15 wherein the external radiation source is a laser.
Claim 20
Dependent Claim
28 words
The method of claim 15 wherein the first conductive plate is polysilicon, and the second conductive plate is a well fabricated in a substrate of the integrated circuit.
Claim 21
Dependent Claim
20 words
The method of claim 15 wherein the dielectric material is a layer of oxide fabricated on the second conductive plate.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-09-21 | 2002-03-23 | 2002-09-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-09-21 | 2006-03-23 | 2006-09-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-09-21 | 2010-03-23 | 2010-09-22 | $7700.00 | Window Closed / Lapsed |