Method for producing a semiconductor gate conductor having an impurity migration barrier

Claim 1

A method for reducing diffusion of dopant from a patterned semiconductor gate conductor to an underlying channel region, the method comprising the steps of: providing a semiconductor substrate and a first layer of dielectric material across one surface of the substrate; providing a conductive material across the dielectric material, said conductive material having an upper and lower surface wherein the upper surface is exposed and the lower surface is adjacent the dielectric material; implanting germanium into the conductive material to a concentration peak density at a first depth relative to the upper surface of said conductive material; selectively removing a portion of the conductive material to present a patterned gate conductor, a source region and a drain region, said source and drain regions are spaced apart within said substrate by a channel region underlying the patterned gate conductor; implanting a dopant material into the source and drain regions simultaneous with implanting dopant material into the patterned gate conductor to a concentration peak density at a second depth within said gate conductor, wherein the second depth is shallower than said first depth; applying metal to said patterned gate conductor and said source and drain regions; depositing in liquid form a second layer of dielectric material across the metal and the patterned gate conductor; and curing the second layer of dielectric material at a temperature sufficient to reflow the second layer of dielectric simultaneous with an anneal of the patterned gate conductor and the source and drain regions.

Claim 2

A method for reducing diffusion of dopant from a patterned semiconductor gate conductor to an underlying channel region, the method comprising the steps of: providing a semiconductor substrate and a first layer of dielectric material across one surface of the substrate; providing a conductive material across the dielectric material, said conductive material having an upper and lower surface wherein the upper surface is exposed and the lower surface is adjacent the dielectric material; implanting germanium into the conductive material to a concentration peak density at a first depth relative to the upper surface of said conductive material; selectively removing a portion of the conductive material to present a patterned gate conductor, a source region and a drain region, said source and drain regions are spaced apart within said substrate by a channel region underlying the patterned gate conductor; implanting a dopant material into the source and drain regions simultaneous with implanting dopant material into the patterned gate conductor to a concentration peak density at a second depth within said gate conductor, wherein the second depth is shallower than said first depth; applying metal to said patterned gate conductor and said source and drain regions; depositing in liquid form a second layer of dielectric material across the metal and the patterned gate conductor; and curing the second layer of dielectric material at a temperature sufficient to reflow the second layer of dielectric simultaneous with an anneal of the patterned gate conductor and the source and drain regions.

Claim 8

A method for reducing diffusion of boron dopant from a patterned semiconductor gate conductor to an underlying n- type channel region, the method comprising: providing a semiconductor n- type substrate and a first layer of dielectric material across one surface of the substrate; providing a conductive material across the dielectric material, said conductive material having an upper and lower surface wherein the upper surface is exposed and the lower surface is adjacent the dielectric material; implanting germanium into the conductive material via the exposed surface to a concentration peak density at a first depth relative to the upper surface of said conductive material, said first depth is substantially equal to 1030 Å; selectively removing a portion of the conductive material and underlying dielectric material to present a source region, a drain region and a patterned gate conductor having a thickness substantially equal to said conductive material, said source and drain regions are spaced apart within said substrate by a channel region underlying the patterned gate conductor; implanting ionized BF 2 into the source and drain regions simultaneous with implanting ionized BF 2 into the patterned gate conductor to a concentration peak density at a second depth within said gate conductor relative to the initial upper surface of said conductive material, said second depth is substantially equal to 500 Å; applying metal to said patterned gate conductor and said source and drain regions; depositing in liquid form a second layer of dielectric material across the metal and the patterned gate conductor; and curing the second layer of dielectric material at a temperature sufficient to simultaneously anneal the patterned gate conductor and the source and drain regions.

Claim 9

A method for reducing diffusion of boron dopant from a patterned semiconductor gate conductor to an underlying n- type channel region, the method comprising: providing a semiconductor n- type substrate and a first layer of dielectric material across one surface of the substrate; providing a conductive material across the dielectric material, said conductive material having an upper and lower surface wherein the upper surface is exposed and the lower surface is adjacent the dielectric material; implanting germanium into the conductive material via the exposed surface to a concentration peak density at a first depth relative to the upper surface of said conductive material, said first depth is substantially equal to 1030 Å; selectively removing a portion of the conductive material and underlying dielectric material to present a source region, a drain region and a patterned gate conductor having a thickness substantially equal to said conductive material, said source and drain regions are spaced apart within said substrate by a channel region underlying the patterned gate conductor; implanting ionized BF 2 into the source and drain regions simultaneous with implanting ionized BF 2 into the patterned gate conductor to a concentration peak density at a second depth within said gate conductor relative to the initial upper surface of said conductive material, said second depth is substantially equal to 500 Å; applying metal to said patterned gate conductor and said source and drain regions; depositing in liquid form a second layer of dielectric material across the metal and the patterned gate conductor; and curing the second layer of dielectric material at a temperature sufficient to simultaneously anneal the patterned gate conductor and the source and drain regions.

Claim 15

A method for producing a boron dopant diffusion barrier in a semiconductor gate conductor, the method comprising the steps of: providing a semiconductor substrate and a first layer of dielectric material onto said substrate and a conductive material onto said dielectric material; implanting germanium ions diffusion barrier into said conductive material to a concentration peak density at a first depth; selectively removing a portion of the conductive material and underlying dielectric material to present a patterned gate conductor spaced above said substrate and a source region and a drain region within said substrate, said source and drain regions are spaced apart within said substrate by a channel regions underlying the patterned gate conductor; implanting BF 2 dopant ions into the source and drain regions simultaneous with implanting BF 2 dopant ions into the patterned gate conductor to a concentration peak density at a second depth, wherein said second depth is shallower than said first depth; and heating the substrate at a temperature sufficient to anneal the patterned gate conductor, whereby a barrier is formed by said germanium ions and the barrier remains between at least 80% of said BF 2 ions within said patterned gate conductor and said channel region.

Claim 16

A method for producing a boron dopant diffusion barrier in a semiconductor gate conductor, the method comprising the steps of: providing a semiconductor substrate and a first layer of dielectric material onto said substrate and a conductive material onto said dielectric material; implanting germanium ions diffusion barrier into said conductive material to a concentration peak density at a first depth; selectively removing a portion of the conductive material and underlying dielectric material to present a patterned gate conductor spaced above said substrate and a source region and a drain region within said substrate, said source and drain regions are spaced apart within said substrate by a channel regions underlying the patterned gate conductor; implanting BF 2 dopant ions into the source and drain regions simultaneous with implanting BF 2 dopant ions into the patterned gate conductor to a concentration peak density at a second depth, wherein said second depth is shallower than said first depth; and heating the substrate at a temperature sufficient to anneal the patterned gate conductor, whereby a barrier is formed by said germanium ions and the barrier remains between at least 80% of said BF 2 ions within said patterned gate conductor and said channel region.