Method of fabricating semiconductor gate electrode with fluorine migration barrier

Claim 1

A method for reducing diffusion of fluorine from a semiconductor gate conductor to an underlying gate oxide, the method comprising the steps of: providing a semiconductor substrate and a gate oxide across one surface of said substrate; providing a polysilicon material across the gate oxide; implanting argon into the polysilicon material to form a concentration peak density at a first depth relative to the upper surface of said polysilicon material; selectively removing a portion of said polysilicon material to present a patterned polysilicon material, a source region and a drain region; and implanting impurities into said source region, said drain region and said patterned polysilicon material, wherein said patterned polysilicon receives said impurities at a second depth relative to the upper surface of said polysilicon material which is shallower than said first depth.

Claim 2

A method for reducing diffusion of fluorine from a semiconductor gate conductor to an underlying gate oxide, the method comprising the steps of: providing a semiconductor substrate and a gate oxide across one surface of said substrate; providing a polysilicon material across the gate oxide; implanting argon into the polysilicon material to form a concentration peak density at a first depth relative to the upper surface of said polysilicon material; selectively removing a portion of said polysilicon material to present a patterned polysilicon material, a source region and a drain region; and implanting impurities into said source region, said drain region and said patterned polysilicon material, wherein said patterned polysilicon receives said impurities at a second depth relative to the upper surface of said polysilicon material which is shallower than said first depth.

Claim 8

A method for reducing diffusion of fluorine from a semiconductor gate conductor to an underlying gate oxide, the method comprising the steps of: providing a semiconductor n-type substrate and a gate oxide across one surface of said substrate; providing a polysilicon material across the gate oxide; implanting argon ions into grain boundary locations within said polysilicon material and into silicon-oxide bond locations within said polysilicon material near the juncture between said polysilicon and said gate oxide, said argon ions are further implanted to form concentration peak density within said polysilicon material, wherein said concentration peak density is at a first depth relative to the upper surface of said polysilicon material; selectively removing a portion of said polysilicon material to present a patterned polysilicon material, a source region and a drain region, said patterned polysilicon material having a thickness substantially equal to the thickness of said polysilicon material; implanting BF 2 ions into the source and drain regions simultaneous with implanting BF 2 ions into the patterned polysilicon to form a concentration peak density at a second depth within said patterned polysilicon material which is shallower than said first depth, wherein fluorine from said implanted BF 2 ions is substantially prevented from diffusing through said grain boundary locations and to said silicon-oxide bond locations due to the presence of argon at said locations; and heating said patterned polysilicon material, said source and said drain to a temperature sufficient to render conductive said patterned polysilicon material, said source and said drain.

Claim 9

A method for reducing diffusion of fluorine from a semiconductor gate conductor to an underlying gate oxide, the method comprising the steps of: providing a semiconductor n-type substrate and a gate oxide across one surface of said substrate; providing a polysilicon material across the gate oxide; implanting argon ions into grain boundary locations within said polysilicon material and into silicon-oxide bond locations within said polysilicon material near the juncture between said polysilicon and said gate oxide, said argon ions are further implanted to form concentration peak density within said polysilicon material, wherein said concentration peak density is at a first depth relative to the upper surface of said polysilicon material; selectively removing a portion of said polysilicon material to present a patterned polysilicon material, a source region and a drain region, said patterned polysilicon material having a thickness substantially equal to the thickness of said polysilicon material; implanting BF 2 ions into the source and drain regions simultaneous with implanting BF 2 ions into the patterned polysilicon to form a concentration peak density at a second depth within said patterned polysilicon material which is shallower than said first depth, wherein fluorine from said implanted BF 2 ions is substantially prevented from diffusing through said grain boundary locations and to said silicon-oxide bond locations due to the presence of argon at said locations; and heating said patterned polysilicon material, said source and said drain to a temperature sufficient to render conductive said patterned polysilicon material, said source and said drain.

Claim 13

A method for minimizing growth of gate oxide comprising the steps of: providing a gate oxide upon an n-type silicon substrate providing a polysilicon material across said gate oxide; implanting BF 2 into said polysilicon material to form a BF 2 concentration peak density; implanting argon into said polysilicon material prior to the immediately preceding step, wherein said argon is implanted to form a argon concentration peak density at a location within the polysilicon material which is between said oxide and the location of said BF 2 concentration peak density for: minimizing fluorine from said BF 2 from diffusing to said gate oxide; further minimizing said fluorine from dislodging oxygen within said gate oxide; and still further minimizing said dislodged oxygen from diffusing toward said silicon substrate and recombining with silicon at the juncture between said gate oxide and said substrate.

Claim 14

A method for minimizing growth of gate oxide comprising the steps of: providing a gate oxide upon an n-type silicon substrate providing a polysilicon material across said gate oxide; implanting BF 2 into said polysilicon material to form a BF 2 concentration peak density; implanting argon into said polysilicon material prior to the immediately preceding step, wherein said argon is implanted to form a argon concentration peak density at a location within the polysilicon material which is between said oxide and the location of said BF 2 concentration peak density for: minimizing fluorine from said BF 2 from diffusing to said gate oxide; further minimizing said fluorine from dislodging oxygen within said gate oxide; and still further minimizing said dislodged oxygen from diffusing toward said silicon substrate and recombining with silicon at the juncture between said gate oxide and said substrate.