US5296386A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of providing lower contact resistance in MOS transistor structures
Assignee: National Semiconductor Corp
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Filing: 1991-03-06
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Granted: 1994-03-22
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Expires: 2011-03-06
Abstract
Abstract Germanium is used to significantly enhance the drift mobilities of minority carriers in the channels of N-channel and P-channel metal-oxide-semiconductor (MOS) transistors with silicon substrates. Germanium processing is also used to enhance the source/drain contact conductance for MOS devices. Methods are disclosed for forming the germanium-rich interfacial layer utilizing a germanium implant and wet oxidation or growing a silicon-germanium alloy by molecular beam epitaxy.
Inventors
- 👤 Sheldon Aronowitz
- 👤 Courtney Hart
- 👤 Court Skinner
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 22:40
CPC Classifications
H; H10; H10P; H10P30/00; H10P30/20; H10P30/202; H10P30/204; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/027; H10D62/00; H10D62/80; H10D62/83; H10D62/832; H10D64/00; H10D64/01; H10D64/011; H10D64/0111; H10D64/0113; H10P14/00; H10P14/60; H10P14/63; H10P14/6302; H10P14/6304; H10P14/6306; H10P14/6308; H10P14/6309; H10P14/6322; H10P14/65; H10P14/6502; H10P30/208; Y; Y10; Y10S; Y10S148/00; Y10S148/048; Y10S148/082
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
107 words
A method of providing lower contact resistance in the source ad drain regions of an MOS transistor, the method comprising the sequential steps of: (a) defining source and drain regions in a silicon substrate, the source and drain regions being spaced apart to define a channel region therebetween; (b) after defining the source and drain regions forming an epitaxial layer of silicon-germanium alloy at the surface of the source and drain regions; and (c) after forming an epitaxial layer forming an MOS transistor structure comprising the source and drain regions and a gate electrode overlying the channel region and separated therefrom by a layer of dielectric material.
Claim 2
Independent Claim
107 words
A method of providing lower contact resistance in the source ad drain regions of an MOS transistor, the method comprising the sequential steps of: (a) defining source and drain regions in a silicon substrate, the source and drain regions being spaced apart to define a channel region therebetween; (b) after defining the source and drain regions forming an epitaxial layer of silicon-germanium alloy at the surface of the source and drain regions; and (c) after forming an epitaxial layer forming an MOS transistor structure comprising the source and drain regions and a gate electrode overlying the channel region and separated therefrom by a layer of dielectric material.
Claim 3
Dependent Claim
15 words
A method as in claim 1 wherein the silicon-germanium alloy comprises at least 70% germanium.
References Cited (Backward Citations)
US3725161A
Cited
JPS6190470A
Cited
JPS63122176A
Cited
US4837173A
Cited
US4835112A
Cited
US4920076A
Cited
US5019882A
Cited
US4983536A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-03-21 | 1997-09-20 | 1998-03-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-03-21 | 2001-09-20 | 2002-03-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-03-21 | 2005-09-20 | 2006-03-22 | $7700.00 | Window Closed / Lapsed |