US4983536A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of fabricating junction field effect transistor
Assignee: Verizon Laboratories Inc
•
Filing: 1989-11-24
•
Granted: 1991-01-08
•
Expires: 2009-11-24
Abstract
Abstract A junction field effect transistor, specifically a static induction transistor. Prior to metallization a thin layer of germanium is placed over the exposed silicon of the source and gate regions. The germanium is intermixed with the underlying silicon to form a germanium-silicon composite. A rapid thermal anneal is performed to recrystallize the germanium-silicon composite. Alternatively, a single crystal epitaxial layer may be deposited on the silicon. Conventional metallization procedures are employed to produce ohmic source and gate contact members to the germanium-silicon composite or the epitaxial germanium of the source and gate regions. By virtue of the reduced bandgap provided by the presence of the germanium, the contact resistance of the device is reduced.
Inventors
- 👤 Emel S. Bulat
- 👤 Marvin J. Tabasky
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 21:56
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/051; H10D30/0512; H10D30/202; H10D62/00; H10D62/80; H10D62/85; H10D64/00; H10D64/60; H10D64/62; Y; Y10; Y10S; Y10S148/00; Y10S148/059
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
254 words
The method of fabricating a junction field effect transistor comprising providing a body of silicon including a substrate of silicon of one conductivity type of relatively low resistivity and a layer of silicon of the one conductivity type of relatively high resistivity contiguous with said substrate, said layer having a surface at a surface of the body; forming a layer of adherent, nonconductive protective material adherent at said surface having openings therein exposing alternating source surface areas and gate surface areas; introducing conductivity type imparting material of the opposite conductivity type into said layer of silicon of the one conductivity type of relatively high resistivity from said gate surface areas to produce gate regions of the opposite conductivity type in said layer of silicon of the one conductivity type of relatively high resistivity at said gate surface areas; introducing conductivity type imparting material of the one conductivity type into said layer of silicon of the one conductivity type of relatively high resistivity from said source surface areas to produce source regions of the one conductivity type of lower resistivity in said layer of silicon of the one conductivity type of relatively high resistivity at said source surface areas; placing germanium at said source surface areas and said gate surface areas; forming a germanium-silicon composite of the germanium with underlying silicon at the source surface areas and the gate surface areas; and applying conductive material to form source and gate contacts in ohmic contact with the germanium-silicon composite at the source and gate regions, respectively.
Claim 2
Independent Claim
254 words
The method of fabricating a junction field effect transistor comprising providing a body of silicon including a substrate of silicon of one conductivity type of relatively low resistivity and a layer of silicon of the one conductivity type of relatively high resistivity contiguous with said substrate, said layer having a surface at a surface of the body; forming a layer of adherent, nonconductive protective material adherent at said surface having openings therein exposing alternating source surface areas and gate surface areas; introducing conductivity type imparting material of the opposite conductivity type into said layer of silicon of the one conductivity type of relatively high resistivity from said gate surface areas to produce gate regions of the opposite conductivity type in said layer of silicon of the one conductivity type of relatively high resistivity at said gate surface areas; introducing conductivity type imparting material of the one conductivity type into said layer of silicon of the one conductivity type of relatively high resistivity from said source surface areas to produce source regions of the one conductivity type of lower resistivity in said layer of silicon of the one conductivity type of relatively high resistivity at said source surface areas; placing germanium at said source surface areas and said gate surface areas; forming a germanium-silicon composite of the germanium with underlying silicon at the source surface areas and the gate surface areas; and applying conductive material to form source and gate contacts in ohmic contact with the germanium-silicon composite at the source and gate regions, respectively.
Claim 3
Dependent Claim
16 words
The method in accordance with claim 1 including heating to cause recrystallization of the germanium-silicon composite.
Claim 4
Dependent Claim
41 words
The method in accordance with claim 2 including subsequent to placing germanium implanting argon ions into the body at the source surface areas and the gate surface areas to mix the germanium with the adjacent silicon and from the germanium-silicon composite.
Claim 5
Dependent Claim
18 words
The method in accordance with claim 3 wherein the thickness of the germanium is less than 500 angstroms.
Claim 6
Dependent Claim
32 words
The method in accordance with claim 4 wherein heating to cause recrystallization of the germanium-silicon composite comprises heating at a temperature of between 700° and 900° C. for less than two minutes.
Claim 7
Dependent Claim
34 words
The method in accordance with claim 3 wherein placing germanium includes growing an epitaxial layer of germanium on the surface of the silicon at the source surface areas and at the gate surface areas.
Claim 8
Dependent Claim
73 words
The method in accordance with claim 3 wherein placing germanium at said surface areas and said gate surface areas includes placing a masking material on said layer of protective material while leaving said source surface areas and said gate surface areas exposed; depositing a layer of germanium over the body: and removing said masking material together with the overlying germanium while leaving germanium overlying said source surface areas and said gate surface areas.
Claim 9
Independent Claim
247 words
The method of fabricating a junction field effect transistor comprising providing a body of silicon including a substrate of silicon of one conductivity type of relatively low resistivity and a layer of silicon of the one conductivity type of relatively high resistivity contiguous with said substrate said layer having a surface at a surface of the body; forming a layer of adherent nonconductive, protective material adherent at said surface having openings therein exposing alternating source surface areas; and gate surface areas; introducing conductivity type imparting material of the opposite conductivity type into said layer of silicon of the one conductivity type of relatively high resistivity from said gate surface areas to produce gate regions of the opposite conductivity type in said layer of silicon of the one conductivity type of relatively high resistivity at said gate surface areas; introducing conductivity type imparting material of the one conductivity type into said layer of silicon of the one conductivity type of relatively high resistivity from said source surface areas to produce surface regions of the one conductivity type of lower resistivity in said layer of silicon of the one conductivity type of relatively high resistivity at said source surface areas; growing an epitaxial layer of germanium on the surface of the silicon at the source surface areas and at the gate surface areas; and applying conductive material to form source and gate contacts in ohmic contact with the germanium overlying the silicon of the source and gate regions, respectively.
Claim 10
Independent Claim
247 words
The method of fabricating a junction field effect transistor comprising providing a body of silicon including a substrate of silicon of one conductivity type of relatively low resistivity and a layer of silicon of the one conductivity type of relatively high resistivity contiguous with said substrate said layer having a surface at a surface of the body; forming a layer of adherent nonconductive, protective material adherent at said surface having openings therein exposing alternating source surface areas; and gate surface areas; introducing conductivity type imparting material of the opposite conductivity type into said layer of silicon of the one conductivity type of relatively high resistivity from said gate surface areas to produce gate regions of the opposite conductivity type in said layer of silicon of the one conductivity type of relatively high resistivity at said gate surface areas; introducing conductivity type imparting material of the one conductivity type into said layer of silicon of the one conductivity type of relatively high resistivity from said source surface areas to produce surface regions of the one conductivity type of lower resistivity in said layer of silicon of the one conductivity type of relatively high resistivity at said source surface areas; growing an epitaxial layer of germanium on the surface of the silicon at the source surface areas and at the gate surface areas; and applying conductive material to form source and gate contacts in ohmic contact with the germanium overlying the silicon of the source and gate regions, respectively.
References Cited (Backward Citations)
JPS53122384A
Cited
US4596605A
Cited
US4551909A
Cited
US4617066A
Cited
US4611384A
Cited
US4849371A
Cited
US4837173A
Cited
US4835112A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-01-07 | 1994-07-09 | 1995-01-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-01-07 | 1998-07-09 | 1999-01-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-01-07 | 2002-07-09 | 2003-01-08 | $7700.00 | Window Closed / Lapsed |