Patent US5622901A successfully refreshed from Google Patents.
US5622901A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of forming a semiconductor strain sensor
Assignee: Denso Corp
•
Filing: 1994-08-02
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Granted: 1997-04-22
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Expires: 2014-08-02
Abstract
Abstract In a semiconductor strain sensor, for example, using resistors of a polycrystalline semiconductor material such as polycrystalline silicon as strain gauges, the sum of the temperature coefficient of resistance (TCR) of the resistor and the temperature coefficient of strain sensitivity (TCK) is adjusted not by controlling the impurity carrier concentration but by controlling the resistivity, thereby an output fluctuation due to a change in the temperature can be suppressed.
Inventors
- 👤 Tsuyoshi Fukada
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 13:00
CPC Classifications
G; G01; G01L; G01L1/00; G01L1/20; G01L1/22; G01L1/225; G01L1/2262; G01L1/2287; G01L1/2293; G01L23/00; G01L23/08; G01L23/18; G01L9/00; G01L9/0041; G01L9/0051; G01L9/0052; G01L9/0055
Claims Analysis
Total Claims: 26
Claim 1
Independent Claim
175 words
A method of forming a temperature coefficient of strain sensitivity (TCK) compensated semiconductor strain sensor including a detection circuit, said method comprising the steps of: forming a polycrystalline silicon resistor film including grains of a crystal on an insulative substrate at a stress receiving region of said insulative substrate, said polycrystalline silicon resistor film having a piezoelectric effect and being formed to have a thickness of less than 0.4 μm, said step of forming said polycrystalline silicon resistor film including a step of: setting a resistivity of said polycrystalline silicon resistor film having said thickness of less than 0.4 μm to a value between 1.9×10 -3 and 3.9×10 -3 Ω·cm at room temperature; and forming said detection circuit to be in electrical contact with said polycrystalline silicon resistor film corresponding to an amount of strain applied to said stress receiving region of said insulative substrate; wherein said thickness of said polycrystalline silicon resistor film corresponds to a thickness of a single layer of said grains of said crystal included in said polycrystalline silicon resistor film.
Claim 2
Independent Claim
175 words
A method of forming a temperature coefficient of strain sensitivity (TCK) compensated semiconductor strain sensor including a detection circuit, said method comprising the steps of: forming a polycrystalline silicon resistor film including grains of a crystal on an insulative substrate at a stress receiving region of said insulative substrate, said polycrystalline silicon resistor film having a piezoelectric effect and being formed to have a thickness of less than 0.4 μm, said step of forming said polycrystalline silicon resistor film including a step of: setting a resistivity of said polycrystalline silicon resistor film having said thickness of less than 0.4 μm to a value between 1.9×10 -3 and 3.9×10 -3 Ω·cm at room temperature; and forming said detection circuit to be in electrical contact with said polycrystalline silicon resistor film corresponding to an amount of strain applied to said stress receiving region of said insulative substrate; wherein said thickness of said polycrystalline silicon resistor film corresponds to a thickness of a single layer of said grains of said crystal included in said polycrystalline silicon resistor film.
Claim 3
Dependent Claim
31 words
A method of forming said TCK compensated semiconductor strain sensor according to claim 1, wherein: said polycrystalline silicon resistor film is formed to have a thickness of less than 0.1 μm.
Claim 4
Dependent Claim
84 words
A method of forming said TCK compensated semiconductor strain sensor according to claim 1, wherein said step of setting said resistivity of said polycrystalline silicon resistor film includes the step of: introducing an impurity into said polycrystalline silicon resistor film at an optimum dose amount to form said polycrystalline silicon resistor film; whereby said polycrystalline silicon resistor film is controlled to have said resistivity of between 1.9×10 -3 and 3.9×10 -3 Ω·cm -3 at room temperature at said thickness of less than 0.4 μm.
Claim 5
Dependent Claim
34 words
A method of forming said TCK compensated semiconductor strain sensor according to claim 3, wherein said step of introducing said impurity into said polycrystalline silicon film includes a step of: ion implanting said impurity.
Claim 6
Dependent Claim
55 words
A method of forming said TCK compensated semiconductor strain sensor according to claim 4, wherein said step of ion implanting said impurity includes a step of: adjusting an ion implantation condition such that a peak of impurity concentration distribution as implanted is located at approximately a center of said thickness of said polycrystalline silicon film.
Claim 7
Dependent Claim
36 words
A method of forming said TCK compensated semiconductor strain sensor according to claim 5, further comprising, after said step of ion implanting said impurity, a step of: annealing said polycrystalline silicon film to activate said impurity.
Claim 8
Dependent Claim
174 words
A method of forming said TCK compensated semiconductor strain sensor according to claim 1, wherein said step of setting said resistivity of said polycrystalline silicon resistor film includes the step of: introducing an impurity into said polycrystalline silicon resistor film at an optimum first dose amount to form a first polycrystalline silicon resistor film having said thickness of less than 0.4 μm; wherein said optimum dose amount of said impurity in said polycrystalline silicon resistor film has said thickness of less than 0.4 μm, said polycrystalline silicon resistor film has a resistivity in a range between 1.9×10 -3 and 3.9×10 -3 Ω·cm at room temperature, and said optimum dose amount of said impurity is based on self compensation between a temperature coefficient of resistance (TCR) of said polycrystalline silicon resistor film and a temperature coefficient of strain sensitivity of said polycrystalline silicon resistor film, whereby said polycrystalline silicon resistor film is controlled at said thickness less than 0.4 μm to have said resistivity of between 1.9×10 -3 and 3.9×10 -3 Ω·m at room temperature.
Claim 9
Dependent Claim
34 words
A method of forming said TCK compensated semiconductor strain sensor according to claim 7, wherein said step of introducing said impurity into said polycrystalline silicon film includes a step of: ion implanting said impurity.
Claim 10
Dependent Claim
55 words
A method of forming said TCK compensated semiconductor strain sensor according to claim 8, wherein said step of ion implanting said impurity includes a step of: adjusting an ion implantation condition such that a peak of impurity concentration distribution as implanted is located at approximately a center of said thickness of said polycrystalline silicon film.
Claim 11
Dependent Claim
32 words
A method of forming said TCK compensated semiconductor strain sensor according to claim 9, further comprising, after said step of ion implanting said impurity, a step of: annealing said polycrystalline silicon film.
Claim 12
Dependent Claim
47 words
A method of forming said TCK compensated semiconductor strain sensor according to claim 5, wherein said step of ion implanting said impurity includes a step of ion implanting said impurity with an acceleration voltage of 40 keV at a dose amount of 6×10 15 ions/cm 2 .
Claim 13
Dependent Claim
32 words
A method of forming said TCK compensated semiconductor strain sensor according to claim 5, wherein said step of ion implanting said impurity includes a step of ion implanting a p-type boron impurity.
Claim 14
Independent Claim
170 words
A method of forming a temperature coefficient of strain sensitivity (TCK) compensated semiconductor strain sensor including a detection circuit, said method comprising the steps of: forming a polycrystalline silicon resistor film including grains of a crystal on an insulative substrate at a stress receiving region of said insulative substrate, said polycrystalline silicon resistor film having a piezoelectric effect and being formed to have a thickness of less than 0.4 μm, said step of forming said polycrystalline silicon resistor film including a step of: setting a resistivity of said polycrystalline silicon resistor film having said thickness of less than 0.4 μm to a value between 1.9×10 -3 and 3.9×10 -3 Ω·cm at room temperature; and forming said detection circuit to be in electrical contact with said polycrystalline silicon resistor film corresponding to an amount of strain applied to said stress receiving region of said insulative substrate; wherein said polycrystalline silicon resistor film is thinner than a single layer of said grains of said crystal included in said polycrystalline silicon resistor film.
Claim 15
Independent Claim
170 words
A method of forming a temperature coefficient of strain sensitivity (TCK) compensated semiconductor strain sensor including a detection circuit, said method comprising the steps of: forming a polycrystalline silicon resistor film including grains of a crystal on an insulative substrate at a stress receiving region of said insulative substrate, said polycrystalline silicon resistor film having a piezoelectric effect and being formed to have a thickness of less than 0.4 μm, said step of forming said polycrystalline silicon resistor film including a step of: setting a resistivity of said polycrystalline silicon resistor film having said thickness of less than 0.4 μm to a value between 1.9×10 -3 and 3.9×10 -3 Ω·cm at room temperature; and forming said detection circuit to be in electrical contact with said polycrystalline silicon resistor film corresponding to an amount of strain applied to said stress receiving region of said insulative substrate; wherein said polycrystalline silicon resistor film is thinner than a single layer of said grains of said crystal included in said polycrystalline silicon resistor film.
Claim 16
Dependent Claim
31 words
A method of forming said TCK compensated semiconductor strain sensor according to claim 13, wherein said polycrystalline silicon resistor film is formed to have a thickness of less than 0.1 μm.
Claim 17
Dependent Claim
84 words
A method of forming said TCK compensated semiconductor strain sensor according to claim 13, wherein said step of setting said resistivity of said polycrystalline silicon resistor film includes the step of: introducing an impurity into said polycrystalline silicon resistor film at an optimum dose amount to form said polycrystalline silicon resistor film; whereby said polycrystalline silicon resistor film is controlled to have said resistivity of between 1.9×10 -3 and 3.9×10 -3 Ω·cm -3 at room temperature at said thickness of less than 0.4 μm.
Claim 18
Dependent Claim
34 words
A method of forming said TCK compensated semiconductor strain sensor according to claim 15, wherein said step of introducing said impurity into said polycrystalline silicon film includes a step of: ion implanting said impurity.
Claim 19
Dependent Claim
55 words
A method of forming said TCK compensated semiconductor strain sensor according to claim 16, wherein said step of ion implanting said impurity includes a step of: adjusting an ion implantation condition such that a peak of impurity concentration distribution as implanted is located at approximately a center of said thickness of said polycrystalline silicon film.
Claim 20
Dependent Claim
47 words
A method of forming said TCK compensated semiconductor strain sensor according to claim 17, wherein said step of ion implanting said impurity includes a step of ion implanting said impurity with an acceleration voltage of 40 keV at a dose amount of 6×10 15 ions/cm 2 .
Claim 21
Dependent Claim
32 words
A method of forming said TCK compensated semiconductor strain sensor according to claim 17, wherein said step of ion implanting said impurity includes a step of ion implanting a p-type boron impurity.
Claim 22
Dependent Claim
36 words
A method of forming said TCK compensated semiconductor strain sensor according to claim 17, further comprising, after said step of ion implanting said impurity, a step of: annealing said polycrystalline silicon film to activate said impurity.
Claim 23
Dependent Claim
173 words
A method of forming said TCK compensated semiconductor strain sensor according to claim 13, wherein said step of setting said resistivity of said polycrystalline silicon resistor film includes the step of: introducing an impurity into said polycrystalline silicon film at an optimum first dose amount to form a first polycrystalline silicon resistor film having said thickness of less than 0.4 μm; wherein said optimum dose amount of said impurity in said polycrystalline silicon resistor film having said thickness of less than 0.4 μm, said polycrystalline silicon resistor film has a resistivity in a range between 1.9×10 -3 and 3.9×10 -3 Ω·cm at room temperature, and said optimum dose amount of said impurity is based on self compensation between a temperature coefficient of resistance (TCR) of said polycrystalline silicon resistor film and a temperature coefficient of strain sensitivity of said polycrystalline silicon resistor film, whereby said polycrystalline silicon resistor film is controlled at said thickness less than 0.4 μm to have said resistivity of between 1.9×10 -3 and 3.9×10 -3 Ω·m at room temperature.
Claim 24
Dependent Claim
34 words
A method of forming said TCK compensated semiconductor strain sensor according to claim 21, wherein said step of introducing said impurity into said polycrystalline silicon film includes a step of: ion implanting said impurity.
Claim 25
Dependent Claim
55 words
A method of forming said TCK compensated semiconductor strain sensor according to claim 21, wherein said step of ion implanting said impurity includes a step of: adjusting an ion implantation condition such that a peak of impurity concentration distribution as implanted is located at approximately a center of said thickness of said polycrystalline silicon film.
Claim 26
Dependent Claim
32 words
A method of forming said TCK compensated semiconductor strain sensor according to claim 23, further comprising, after said step of ion implanting said impurity, a step of: annealing said polycrystalline silicon film.
References Cited (Backward Citations)
US3871007A
Cited
US4455567A
Cited
US4618397A
Cited
US4622856A
Cited
US4579600A
Cited
US4670969A
Cited
US4637126A
Cited
JPS62234363A
Cited
JPS6323372A
Cited
JPS6323371A
Cited
JPS6352467A
Cited
US4762801A
Cited
JPS63299159A
Cited
US4843027A
Cited
JPH0249472A
Cited
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