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US4762801A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of fabricating polycrystalline silicon resistors having desired temperature coefficients

Assignee: Semiconductor Components Industries LLC
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Filing: 1987-02-20
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Granted: 1988-08-09
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Expires: 2007-02-20
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Abstract

Abstract A method of fabricating polycrystalline silicon resistors having nearly zero or positive temperature coefficient includes the steps of depositing a layer of polycrystalline silicon, implanting the layer with silicon to make the layer substantially amorphous, introducing an impurity to dope the layer, and annealing the layer.

Inventors

  • 👤 Ashok K. Kapoor

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 13:13
CPC Classifications
H; H10; H10D; H10D1/00; H10D1/40; H10D1/47; H01; H01C; H01C17/00; H01C17/06; H01C17/075; H01C17/14; H10P; H10P32/00; H10P32/30; H10P32/302; Y; Y10; Y10S; Y10S148/00; Y10S148/136; Y10S438/00; Y10S438/934

Claims Analysis

Total Claims: 17
Claim 1
Independent Claim 51 words
A method of fabricating polycrystalline silicon resistors having substantially zero or positive temperature coefficient of resistance on semiconductor structures comprising: depositing polycrystalline silicon on the semiconductor structure; implanting the polycrystalline silicon to make it substantially amorphous silicon; introducing at least one impurity into the amorphous silicon; and annealing the amorphous silicon.
Claim 2
Independent Claim 51 words
A method of fabricating polycrystalline silicon resistors having substantially zero or positive temperature coefficient of resistance on semiconductor structures comprising: depositing polycrystalline silicon on the semiconductor structure; implanting the polycrystalline silicon to make it substantially amorphous silicon; introducing at least one impurity into the amorphous silicon; and annealing the amorphous silicon.
Claim 3
Dependent Claim 15 words
A method as in claim 1 wherein the step of implanting comprises implanting with silicon.
Claim 4
Dependent Claim 32 words
A method as in claim 2 wherein the step of implanting comprises implanting with an implant having a damage density greater than 1×10 21 KeV per cubic centimeter throughout the polycrystalline silicon.
Claim 5
Dependent Claim 37 words
A method as in claim 3 wherein the step of implanting comprises implanting with a dose of 1×10 15 silicon atoms per square centimeter and an energy of 40 KeV, then 90 KeV and then 120 KeV.
Claim 6
Dependent Claim 20 words
A method as in claim 1 wherein the step of introducing comprises introducing about 1×10 15 ions per square centimeter.
Claim 7
Dependent Claim 18 words
A method as in claim 5 wherein the ions are introduced with an energy of about 80 KeV.
Claim 8
Dependent Claim 18 words
A method as in claim 1 wherein the step of introducing comprises doping the amorphous silicon with boron.
Claim 9
Dependent Claim 20 words
A method as in claim 1 wherein the wherein the step of introducing comprises doping the amorphous silicon with phosphorus.
Claim 10
Dependent Claim 21 words
A method as in claim 1 wherein the step of annealing comprises first annealing at between 500° C. and 650° C.
Claim 11
Dependent Claim 22 words
A method as in claim 9 wherein the step of annealing further comprises the annealing at between 850° C. and 1000° C.
Claim 12
Dependent Claim 22 words
A method as in claim 10 wherein the step of annealing further comprises annealing at between 300° C. and about 450° C.
Claim 13
Dependent Claim 34 words
A method as in claim 1 wherein the step of annealing comprises annealing at about 600° C. in nitrogen, then at about 950° C. in nitrogen, and then at about 450° C. in hydrogen.
Claim 14
Dependent Claim 35 words
A method as in claim 12 wherein the annealing at about 600° C., at about 950° C. and about 450° C. is performed for about 8 hours, about 30 minutes and about 30 minutes, respectively.
Claim 15
Dependent Claim 35 words
A method as in claim 1 wherein following the step of depositing a step is performed comprising defining a mask over the polycrystalline silicon which mask includes openings where the polycrystalline silicon regions are desired.
Claim 16
Independent Claim 81 words
A method of fabricating a polycrystalline silicon resistor having substantially zero or positive temperature coefficient of resistance comprising: depositing a layer of polycrystalline silicon on an insulating substrate; implanting the layer with silicon to render the layer substantially amorphous; doping the layer with boron; annealing the layer at a first temperature in an inert ambient; further annealing the layer in an inert ambient at a second temperature higher than the first temperature; and again annealing the layer in a hydrogen atmosphere.
Claim 17
Independent Claim 81 words
A method of fabricating a polycrystalline silicon resistor having substantially zero or positive temperature coefficient of resistance comprising: depositing a layer of polycrystalline silicon on an insulating substrate; implanting the layer with silicon to render the layer substantially amorphous; doping the layer with boron; annealing the layer at a first temperature in an inert ambient; further annealing the layer in an inert ambient at a second temperature higher than the first temperature; and again annealing the layer in a hydrogen atmosphere.

References Cited (Backward Citations)

US4467519A Cited
JPS59155121A Cited
US4579600A Cited
US4643777A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1991-08-09 1992-02-08 1992-08-09 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1995-08-09 1996-02-08 1996-08-09 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1999-08-09 2000-02-08 2000-08-09 $7700.00 Window Closed / Lapsed

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