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US5589410A
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An integrated semiconductor device having a buried semiconductor layer and fabrication method thereof
Assignee: Fujitsu Semiconductor Ltd
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Filing: 1994-07-22
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Granted: 1996-12-31
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Expires: 2014-07-22
Abstract
Abstract A structure and its fabrication method of an integrated semiconductor device including circuit elements such as MOSFETs. A well is formed in the semiconductor substrate within windows of a field oxide layer. A lightly-doped semiconductor layer is selectively formed on the exposed surface of the well. A channel region and a pair of source and drain regions of a MOSFET are formed in the lightly-doped semiconductor layer. The highly-doped buried semiconductor layer of the same conductivity type as that of the lightly-doped semiconductor layer is formed under the channel region in the lightly-doped semiconductor layer. The structural features and fabrication method provides a great degree of freedom in designing a MOSFET having a further shorter-channel length without deteriorating its drivability and punch-through breakdown voltage.
Inventors
- 👤 Noriaki Sato
- 👤 Fumitake Mieno
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 13:46
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/027; H10D30/0278; H10D62/00; H10D62/10; H10D62/17; H10D62/213; H10D62/221; H10D62/235; H10D62/351; H10D62/357; H10D62/364; H10D62/371; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0165; H10D84/0167; H10D84/02; H10D84/03; H10D84/038; H10D84/80; H10D84/82; H10D84/83; H10D84/85; H10D84/859
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
195 words
A method for production of an integrated semiconductor device comprising the steps of: (a) forming a surface portion of a first conductivity type in a semiconductor substrate, wherein the surface portion borders a surface of the semiconductor substrate; (b) forming an insulating layer on the semiconductor substrate, with a window exposing the surface portion; (c) forming a semiconductor layer of the first conductivity type selectively on the surface portion within the window; (d) forming an insulating gate film on a surface of the semiconductor layer within the window of the insulating layer; (e) subsequently to said step (d), forming a buried semiconductor layer of the first conductivity type with an upper surface and a lower surface, wherein the upper surface is in the semiconductor layer; (f) forming an insulated gate electrode on the insulating gate film across the window; and (g) forming a first region of the first conductivity type and a pair of second regions of a second conductivity type opposite to the first conductivity type bordering the surface of the semiconductor layer, wherein the first region of the first conductivity type is between the pair of second regions of the second conductivity type.
Claim 2
Independent Claim
195 words
A method for production of an integrated semiconductor device comprising the steps of: (a) forming a surface portion of a first conductivity type in a semiconductor substrate, wherein the surface portion borders a surface of the semiconductor substrate; (b) forming an insulating layer on the semiconductor substrate, with a window exposing the surface portion; (c) forming a semiconductor layer of the first conductivity type selectively on the surface portion within the window; (d) forming an insulating gate film on a surface of the semiconductor layer within the window of the insulating layer; (e) subsequently to said step (d), forming a buried semiconductor layer of the first conductivity type with an upper surface and a lower surface, wherein the upper surface is in the semiconductor layer; (f) forming an insulated gate electrode on the insulating gate film across the window; and (g) forming a first region of the first conductivity type and a pair of second regions of a second conductivity type opposite to the first conductivity type bordering the surface of the semiconductor layer, wherein the first region of the first conductivity type is between the pair of second regions of the second conductivity type.
Claim 3
Dependent Claim
22 words
The method for production of an integrated semiconductor device according to claim 1, wherein the semiconductor layer is grown by selective epitaxy.
Claim 4
Independent Claim
251 words
A method for production of an integrated semiconductor device, comprising the steps of: (a) forming a surface portion of a first conductivity type in a semiconductor substrate, wherein the surface portion borders a surface of the semiconductor substrate; (b) forming an insulating layer on the semiconductor substrate, with a window exposing the surface portion; (c) forming a semiconductor layer of the first conductivity type selectively on the surface portion within the window; (d) forming a buried semiconductor layer of the first conductivity type with an upper surface and a lower surface, wherein the upper surface is in the semiconductor layer; (e) forming an insulating gate film on a surface of the semiconductor layer, within the window of the insulating layer; and (f) forming an insulated gate electrode on the insulating gate film across the window; (g) forming a first region of the first conductivity type and a pair of second regions of a second conductivity type opposite to the first conductivity type bordering a surface of the semiconductor layer, wherein the first region of the first conductivity type is between the pair of second regions of the second conductivity type; (h) forming a spin-on-glass (SOG) film having a flat surface on entire surfaces of the semiconductor layer and the insulating layer; and (i) etching back a surface of the SOG film uniformly until the surface of the semiconductor layer is exposed, wherein the integrated semiconductor device has a flat surface at a boundary between the semiconductor layer and the insulating layer.
Claim 5
Independent Claim
251 words
A method for production of an integrated semiconductor device, comprising the steps of: (a) forming a surface portion of a first conductivity type in a semiconductor substrate, wherein the surface portion borders a surface of the semiconductor substrate; (b) forming an insulating layer on the semiconductor substrate, with a window exposing the surface portion; (c) forming a semiconductor layer of the first conductivity type selectively on the surface portion within the window; (d) forming a buried semiconductor layer of the first conductivity type with an upper surface and a lower surface, wherein the upper surface is in the semiconductor layer; (e) forming an insulating gate film on a surface of the semiconductor layer, within the window of the insulating layer; and (f) forming an insulated gate electrode on the insulating gate film across the window; (g) forming a first region of the first conductivity type and a pair of second regions of a second conductivity type opposite to the first conductivity type bordering a surface of the semiconductor layer, wherein the first region of the first conductivity type is between the pair of second regions of the second conductivity type; (h) forming a spin-on-glass (SOG) film having a flat surface on entire surfaces of the semiconductor layer and the insulating layer; and (i) etching back a surface of the SOG film uniformly until the surface of the semiconductor layer is exposed, wherein the integrated semiconductor device has a flat surface at a boundary between the semiconductor layer and the insulating layer.
Claim 6
Dependent Claim
38 words
The method for production of an integrated semiconductor device according to claim 3, wherein the spin-on-glass (SOG) film is replaced by a double insulating layer of a vapor-phase grown phosphorous silicate glass (PSG) layer and an SOG film.
Claim 7
Independent Claim
307 words
A method for production of an integrated semiconductor device, comprising the steps of: (a) forming a surface portion of a first conductivity type in a semiconductor substrate, wherein the surface portion borders a surface of the semiconductor substrate; (b) forming an insulating layer on the semiconductor substrate, with a window exposing the surface portion; (c) forming a semiconductor layer of the first conductivity type selectively on the surface portion within the window; (d) forming a buried semiconductor layer of the first conductivity type with an upper surface and a lower surface, wherein the upper surface is in the semiconductor layer; (e) forming an insulating gate film on a surface of the semiconductor layer, within the window of the insulating layer; and (f) forming an insulated gate electrode on the insulating gate film across the window; (g) forming a first region of the first conductivity type and a pair of second regions of a second conductivity type opposite to the first conductivity type bordering a surface of the semiconductor layer, wherein the first region of the first conductivity type is between the pair of second regions of the second conductivity type; (h) forming a spin-on-glass (SOG) film having a flat surface on entire surfaces of the semiconductor layer and the insulating layer; (i) etching back a surface of the SOG film uniformly until the surface of the semiconductor layer is exposed, wherein the integrated semiconductor device has a flat surface at a boundary between the semiconductor layer and the insulating layer; and (j) etching back the surface of the insulating layer, as well as the SOG film, uniformly until the surface of the semiconductor layer is exposed, when a surface plane of the semiconductor layer is recessed from a surface plane of the insulating layer prior to the etching back of the insulating layer and the SOG film.
Claim 8
Independent Claim
307 words
A method for production of an integrated semiconductor device, comprising the steps of: (a) forming a surface portion of a first conductivity type in a semiconductor substrate, wherein the surface portion borders a surface of the semiconductor substrate; (b) forming an insulating layer on the semiconductor substrate, with a window exposing the surface portion; (c) forming a semiconductor layer of the first conductivity type selectively on the surface portion within the window; (d) forming a buried semiconductor layer of the first conductivity type with an upper surface and a lower surface, wherein the upper surface is in the semiconductor layer; (e) forming an insulating gate film on a surface of the semiconductor layer, within the window of the insulating layer; and (f) forming an insulated gate electrode on the insulating gate film across the window; (g) forming a first region of the first conductivity type and a pair of second regions of a second conductivity type opposite to the first conductivity type bordering a surface of the semiconductor layer, wherein the first region of the first conductivity type is between the pair of second regions of the second conductivity type; (h) forming a spin-on-glass (SOG) film having a flat surface on entire surfaces of the semiconductor layer and the insulating layer; (i) etching back a surface of the SOG film uniformly until the surface of the semiconductor layer is exposed, wherein the integrated semiconductor device has a flat surface at a boundary between the semiconductor layer and the insulating layer; and (j) etching back the surface of the insulating layer, as well as the SOG film, uniformly until the surface of the semiconductor layer is exposed, when a surface plane of the semiconductor layer is recessed from a surface plane of the insulating layer prior to the etching back of the insulating layer and the SOG film.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-12-31 | 2000-07-01 | 2000-12-31 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-12-31 | 2004-07-01 | 2004-12-31 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-12-31 | 2008-07-01 | 2008-12-31 | $7700.00 | Window Closed / Lapsed |