Method for manufacturing a semiconductor device

Claim 1

A manufacturing method of a semiconductor device comprising the steps of: selectively forming an element separation insulator layer, which surrounds an active region and insulates said active region from other active regions, at a predetermined position on a main surface of a semiconductor substrate; forming a semiconductor layer on an entire area of a main surface of said semiconductor substrate after said formation of said element separation insulator layer; applying a resist film substantially flat on an entire main surface of said semiconductor layer; etching said semiconductor layer and said resist film at a substantially equal selection ratio so as to expose said element separation insulator layer throughout a periphery thereof and to flatten a main surface of said semiconductor layer at a height by which a stepped portion is not formed relative to said element separation insulator layer; and forming an element on said flattened main surface of said semiconductor layer; wherein said step for selectively forming said element separation insulator layer includes the steps of: (i) forming a polysilicon layer on said main surface of said semiconductor substrate with a first silicon oxide film therebetween, (ii) depositing a second silicon oxide film on said polysilicon layer, (iii) sequentially and selectively etching said second silicon oxide film, said polysilicon layer and said first silicon oxide film by means of photolithography to form a field shield part, and (iv) forming a sidewall spacer on a side wall of said field shield part by deposition of a third silicon oxide film and anisotropic etching applied thereon; and wherein said step of forming said element on said flattened main surface of said semiconductor layer includes the steps of: (i) forming a gate part on a portion of said flattened main surface of said semiconductor layer, and (ii) forming a source/drain region by injecting an impurity ion of a conductive type opposite to that of said semiconductor layer, wherein said injecting includes ion implantation above an inclined surface of said sidewall spacer such that said source/drain region extends to said inclined surface of said sidewall spacer.