US4824799A
Expired / Lapsed
US
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Method of making a bipolar semiconductor device
Assignee: Toshiba Corp
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Filing: 1988-04-04
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Granted: 1989-04-25
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Expires: 2008-04-04
Abstract
Abstract An n+-type buried layer is formed in the surface region of a p-type semiconductor substrate. Isulating films are formed on the semiconductor substrate. The insulating films have openings located above the buried layer. An n-type monocrystalline silicon layer is formed in one opening located above the buried layer. A base region is formed in the monocrystalline silicon layer. The base region defines a remaining portion of the monocrystalline silicon layer as a collector region. An emitter region is formed in the base region. A polycrystalline silicon layer is buried in the insulating films to have ohmic contact with the base region and serve as a portion of a base connection region. The polycrystalline silicon layer contains a p-type impurity and serves as an impurity diffusion source for the formation of an external base of the base region. An MoSi2 layer is buried in the insulating films to have ohmic contact with the polycrystalline silicon layer and to serve as a portion of the base connection region, thereby reducing the base resistance. A conductive layer for connection with a collector is formed in another opening.
Inventors
- 👤 Shigeru Komatsu
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 16:16
CPC Classifications
H; H10; H10D; H10D10/00; H10D10/01; H10D10/051; H10D10/054; H10D10/40; H10D64/00; H10D64/01; H10D64/011; H10D64/0111; H10D64/0113; H10D64/20; H10D64/27; H10D64/281; H10P; H10P32/00; H10P32/10; H10P32/14; H10P32/1408; H10P32/1414; H10P32/17; H10P32/171
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
302 words
A method of manufacturing a semiconductor device, comprising the steps of: forming a buried layer of a second conductivity type in a surface region of a semiconductor substrate of a first conductivity type; forming a first insulation film on said buried layer; forming a metallic layer on said first insulation film, said metallic layer overlapping a portion of said buried layer; forming a second insulation film on said first insulation film, said second insulation film overlapping an other portion of said buried layer; forming a first opening in an area of said metallic layer located above said buried layer; forming a polysilicon layer including an impurity of the first conductivity type in at least said opening; etching said polysilicon layer to leave an annular polysilicon layer contacting a side wall of said metallic layer; forming a second opening and a third opening, said second opening being located in a region excluding said metallic layer and penetrating said first insulation film and said second insulation film to reach said buried layer, and said third opening being formed using said annular polysilicon layer and said metallic layer as a mask and penetrating said first insulation film to reach said buried layer; forming a conductive collector connection layer in said second opening; growing a monocrystalline layer in said third opening, said monocrystalline silicon layer contacting said annular polysilicon layer, and diffusing said impurity included in said polysilicon layer into said monocrystalline silicon layer to form an external base region of the first conductivity type; forming a base region of the first conductivity type within said monocrystalline silicon layer to contact said external base region, with a remaining region of the monocrystalline silicon layer of the second conductivity type forming a collector; and forming an emitter region of the second conductivity type within said base region.
Claim 2
Independent Claim
302 words
A method of manufacturing a semiconductor device, comprising the steps of: forming a buried layer of a second conductivity type in a surface region of a semiconductor substrate of a first conductivity type; forming a first insulation film on said buried layer; forming a metallic layer on said first insulation film, said metallic layer overlapping a portion of said buried layer; forming a second insulation film on said first insulation film, said second insulation film overlapping an other portion of said buried layer; forming a first opening in an area of said metallic layer located above said buried layer; forming a polysilicon layer including an impurity of the first conductivity type in at least said opening; etching said polysilicon layer to leave an annular polysilicon layer contacting a side wall of said metallic layer; forming a second opening and a third opening, said second opening being located in a region excluding said metallic layer and penetrating said first insulation film and said second insulation film to reach said buried layer, and said third opening being formed using said annular polysilicon layer and said metallic layer as a mask and penetrating said first insulation film to reach said buried layer; forming a conductive collector connection layer in said second opening; growing a monocrystalline layer in said third opening, said monocrystalline silicon layer contacting said annular polysilicon layer, and diffusing said impurity included in said polysilicon layer into said monocrystalline silicon layer to form an external base region of the first conductivity type; forming a base region of the first conductivity type within said monocrystalline silicon layer to contact said external base region, with a remaining region of the monocrystalline silicon layer of the second conductivity type forming a collector; and forming an emitter region of the second conductivity type within said base region.
Claim 3
Dependent Claim
45 words
The method according to claim 1, including the step of forming an emitter electrode electrically connected to said emitter region, a base electrode electrically connected to an upper surface of said metallic layer, and a collector electrode electrically connected to said conductive collector connection layer.
Claim 4
Dependent Claim
28 words
The method according to claim 1, wherein said conductive collector connection layer is formed of any one of a polysilicon, a monocrystalline silicon, and a high melting point.
Claim 5
Dependent Claim
47 words
The method according to claim 1, wherein said conductive collector connection layer is formed of a monocrystalline silicon layer including an impurity of the second conductivity type, said conductive collector connection layer being grown by the same process as said monocrystalline silicon layer in said third opening.
Claim 6
Dependent Claim
46 words
The method according to claim 1, wherein said conductive collector connection layer is formed of a monocrystalline silicon layer including an impurity of the second conductivity type, and wherein, after said collector connection layer is formed, said monocrystalline silicon layer is grown in the third opening.
Claim 7
Independent Claim
184 words
A method of manufacturing a semiconductor device, comprising the steps of: forming a first insulation film on a semiconductor body; forming a metallic layer on said first insulation film; forming an opening in said metallic layer; forming an annular polysilicon layer, including an impurity of the first conductivity type, in said opening, said annular polysilicon layer contacting a side wall of said metallic layer; forming a hole in said first insulation film using said annular polysilicon layer and said metallic layer as a mask, said hole penetrating said first insulation film to reach said buried layer; growing a monocrystalline silicon layer in said hole, said monocrystalline silicon layer contacting said annular polysilicon layer, and diffusing said impurity included in said polysilicon layer into said monocrystalline silicon layer to form an external base region; forming a base region of the first conductivity type within said monocrystalline silicon layer to contact said external base region, with a remaining region of the monocrystalline silicon layer of the second conductivity type forming a collector; and forming an emitter region of the second conductivity type within said base region.
Claim 8
Independent Claim
184 words
A method of manufacturing a semiconductor device, comprising the steps of: forming a first insulation film on a semiconductor body; forming a metallic layer on said first insulation film; forming an opening in said metallic layer; forming an annular polysilicon layer, including an impurity of the first conductivity type, in said opening, said annular polysilicon layer contacting a side wall of said metallic layer; forming a hole in said first insulation film using said annular polysilicon layer and said metallic layer as a mask, said hole penetrating said first insulation film to reach said buried layer; growing a monocrystalline silicon layer in said hole, said monocrystalline silicon layer contacting said annular polysilicon layer, and diffusing said impurity included in said polysilicon layer into said monocrystalline silicon layer to form an external base region; forming a base region of the first conductivity type within said monocrystalline silicon layer to contact said external base region, with a remaining region of the monocrystalline silicon layer of the second conductivity type forming a collector; and forming an emitter region of the second conductivity type within said base region.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1992-04-24 | 1992-10-24 | 1993-04-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-04-24 | 1996-10-24 | 1997-04-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-04-24 | 2000-10-24 | 2001-04-25 | $7700.00 | Window Closed / Lapsed |