Self-aligned bipolar transistor with inverted polycide base contact

Claim 2

A self-aligned bipolar transistor structure having a metal silicide layer covering the extrinsic base region about an aperture defining the emitter and intrinsic base region characterized by: a doped polysilicon layer covering said metal silicide layer and having the same aperture.

Claim 3

A self-aligned bipolar transistor structure according to claim 1, further characterized in that the metal silicide is tungsten silicide (WSi 2 ) and in that said polysilicon layer is boron doped polycrystalline silicon.

Claim 4

A self-aligned bipolar transistor structure characterized by: a. n-type collector 1, p-type intrinsic base 2 and n+ emitter 3, with associated contacts 11, 12 and 13, related to a device area in a silicon chip; b. a doped silicon device region 1-4, limited in area by a circumscribing silicon dioxide region 5 in said chip; c. a metal silicide layer 6 covering said device region 1-4 and having an aperture within the area of said device; d. a p + polysilicon layer 7 covering said metal silicide layer 6 and having the same aperture, connected to said base contact 12; e. a p + doped extrinsic base region 4 located underneath said metal silicide layer 6 and in said device region 1-4, in the area complementary to the aperture, and having the same dopant agent as the p + polysilicon layer 7, the agent being of a type which passes at process temperature through metal silicide of thickness and composition equivalent to that of said metal silicide layer 6, contacting said metal silicide layer 6; f. an insulating layer 8 covering the surface of said P + polysilicon layer 7 and the edges of said p + polysilicon layer 7 and said metal silicide layer 6 at the aperture; g. an n + doped emitter region 3, within said device region, in the location defined by the aperture and by said p-type intrinsic base region 2; and h. emitter metallization 9 covering said emitter region 3 and insulated from said p + polysilicon layer 7 and from the edges of said p + polysilicon layer 7 and said metal silicide layer 6 at the aperture by said insulating layer 8.

Claim 5

A self-aligned bipolar transistor structure characterized by: a. n-type collector 1, p-type intrinsic base 2 and n+ emitter 3, with associated contacts 11, 12 and 13, related to a device area in a silicon chip; b. a doped silicon device region 1-4, limited in area by a circumscribing silicon dioxide region 5 in said chip; c. a metal silicide layer 6 covering said device region 1-4 and having an aperture within the area of said device; d. a p + polysilicon layer 7 covering said metal silicide layer 6 and having the same aperture, connected to said base contact 12; e. a p + doped extrinsic base region 4 located underneath said metal silicide layer 6 and in said device region 1-4, in the area complementary to the aperture, and having the same dopant agent as the p + polysilicon layer 7, the agent being of a type which passes at process temperature through metal silicide of thickness and composition equivalent to that of said metal silicide layer 6, contacting said metal silicide layer 6; f. an insulating layer 8 covering the surface of said P + polysilicon layer 7 and the edges of said p + polysilicon layer 7 and said metal silicide layer 6 at the aperture; g. an n + doped emitter region 3, within said device region, in the location defined by the aperture and by said p-type intrinsic base region 2; and h. emitter metallization 9 covering said emitter region 3 and insulated from said p + polysilicon layer 7 and from the edges of said p + polysilicon layer 7 and said metal silicide layer 6 at the aperture by said insulating layer 8.