Metallized vias in polyimide

Claim 2

A layered semiconductor device comprising: (a) at least one layer of polyimide, said layer of polyimide having a plurality of metallic inclusions; and (b) a 200 to 500 Å thick layer of a silsesquioxane, derived at least in part from a polyaminoalkylalkoxysilane (PAAS), overlying said layer of polyimide.

Claim 3

The device according to claim 1, wherein said metallic inclusions are substantially free of any silsesquioxane overlying an upper surface thereof.

Claim 4

A semiconductor device comprising a metallized via in a polyimide layer prepared by the process of: (a) applying a solution of a polyimide precursor in an inert solvent to a substrate; (b) heating, in a first heating cycle, said solution of polyimide precursor at a combination of temperature and pressure sufficient to volatilize said inert solvent but insufficient to completely convert said polyimide precursor to polyimide; and continuing said first heating cycle for a period of time at least sufficient to provide a mechanically stable layer; (c) applying a solution containing a polyaminoalkylalkoxysilane (PAAS) in an inert, nonaqueous solvent to said mechanically stable layer of polyimide precursor; (d) heating, in a second heating cycle, said solution of a PAAS at a combination of temperature and pressure sufficient to volatilize said inert solvent but insufficient to completely imidize said polyimide precursor and insufficient to cleave a significant portion of amino functions in said PAAS, and continuing said second heating cycle for a period of time at least sufficient to provide a mechanically stable silane layer; (e) patterning both of said layers of polyimide precursor and silane with a plurality of trenches; (f) depositing sufficient metal on said substrate to at least fill said trenches; (g) heating, in a third heating cycle, said metal, said silane layer and said polyimide precursor layer at a temperature and for a time sufficient to completely imidize said polyimide and to convert said silane layer to a silsesquioxane polymer layer; and (h) chemical-mechanical polishing said substrate to remove all of said metal outside said trenches using said layer of silsesquioxane as a polish stop.

Claim 5

A semiconductor device comprising a metallized via in a polyimide layer prepared by the process of: (a) applying a solution of a polyimide precursor in an inert solvent to a substrate; (b) heating, in a first heating cycle, said solution of polyimide precursor at a combination of temperature and pressure sufficient to volatilize said inert solvent but insufficient to completely convert said polyimide precursor to polyimide; and continuing said first heating cycle for a period of time at least sufficient to provide a mechanically stable layer; (c) applying a solution containing a polyaminoalkylalkoxysilane (PAAS) in an inert, nonaqueous solvent to said mechanically stable layer of polyimide precursor; (d) heating, in a second heating cycle, said solution of a PAAS at a combination of temperature and pressure sufficient to volatilize said inert solvent but insufficient to completely imidize said polyimide precursor and insufficient to cleave a significant portion of amino functions in said PAAS, and continuing said second heating cycle for a period of time at least sufficient to provide a mechanically stable silane layer; (e) patterning both of said layers of polyimide precursor and silane with a plurality of trenches; (f) depositing sufficient metal on said substrate to at least fill said trenches; (g) heating, in a third heating cycle, said metal, said silane layer and said polyimide precursor layer at a temperature and for a time sufficient to completely imidize said polyimide and to convert said silane layer to a silsesquioxane polymer layer; and (h) chemical-mechanical polishing said substrate to remove all of said metal outside said trenches using said layer of silsesquioxane as a polish stop.

Claim 6

A semiconductor device comprising a metallized via in a polyimide layer prepared by the process of: (a) applying a solution containing a polyaminoalkylalkoxysilane (PAAS) in an inert, non-aqueous solvent to a polyimide layer; (b) heating, in a first heating cycle, said solution of a PAAS at a combination of temperature and pressure sufficient to volatilize said inert solvent but insufficient to cleave a significant portion of amino functions in said PAAS, and continuing said first heating cycle for a period of time at least sufficient to provide a mechanically stable silane layer; (c) patterning both of said polyimide and said mechanically stable silane layer with a plurality of trenches; (d) depositing sufficient metal to at least fill said trenches; (e) heating, in a second heating cycle, said metal, silane and polyimide at a temperature and for a time sufficient to convert said silane layer to a silsesquioxane polymer layer; and (f) chemical-mechanical polishing said substrate to remove all of said metal outside said trenches using said layer of silsesquioxane as a polish stop.

Claim 7

A semiconductor device comprising a metallized via in a polyimide layer prepared by the process of: (a) applying a solution containing a polyaminoalkylalkoxysilane (PAAS) in an inert, non-aqueous solvent to a polyimide layer; (b) heating, in a first heating cycle, said solution of a PAAS at a combination of temperature and pressure sufficient to volatilize said inert solvent but insufficient to cleave a significant portion of amino functions in said PAAS, and continuing said first heating cycle for a period of time at least sufficient to provide a mechanically stable silane layer; (c) patterning both of said polyimide and said mechanically stable silane layer with a plurality of trenches; (d) depositing sufficient metal to at least fill said trenches; (e) heating, in a second heating cycle, said metal, silane and polyimide at a temperature and for a time sufficient to convert said silane layer to a silsesquioxane polymer layer; and (f) chemical-mechanical polishing said substrate to remove all of said metal outside said trenches using said layer of silsesquioxane as a polish stop.

Claim 8

A semiconductor device comprising a metallized via in a polyimide layer prepared by the process comprising providing a 200 to 500 Å thick layer of a silsesquioxane, derived at least in part from a polyaminoalkylalkoxysilane (PAAS), on an upper surface of said polyimide layer and using said silsesquioxane layer as a polish stop for removing, by chemical mechanical polishing, metallization deposited on said silsesquioxane layer while leaving metallization deposited in a plurality of recessed structures in said polyimide layer.

Claim 9

A semiconductor device comprising a metallized via in a polyimide layer prepared by the process comprising providing a 200 to 500 Å thick layer of a silsesquioxane, derived at least in part from a polyaminoalkylalkoxysilane (PAAS), on an upper surface of said polyimide layer and using said silsesquioxane layer as a polish stop for removing, by chemical mechanical polishing, metallization deposited on said silsesquioxane layer while leaving metallization deposited in a plurality of recessed structures in said polyimide layer.

Claim 10

The device according to claim 5, wherein said metallization in said polyimide layer is substantially free of any silsesquioxane overlying an upper surface thereof.