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US5516726A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of manufacturing local interconnection for semiconductors

Assignee: International Business Machines Corp
•
Filing: 1994-11-22
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Granted: 1996-05-14
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Expires: 2014-11-22
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Abstract

Abstract A process, compatible with bipolar and CMOS processes, for making local interconnection of adjacent devices on a semiconductor substrate is disclosed. An electrically insulating etch stop layer is deposited over the semiconductor substrate including the device contact openings. A conductive layer is deposited over the etch stop layer. The conductive layer is patterned into a local interconnect by use of resist patterning and subtractive etching, stopping on the etch stop layer. By thermal activation, the conductive pattern and the underlying insulating material interact to become a single electrically conductive layer. This layer also establishes electrical contact to the devices thus completing the formation of the local interconnection of the devices on a semiconductor substrate.

Inventors

  • 👤 Paul S. Kim
  • 👤 Seiki Ogura

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 12:42
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/0698

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 102 words
A method of manufacturing a local interconnection of devices on a semiconductor substrate, comprising: providing a semiconductor substrate containing a plurality of devices and having a surface with contact openings to said devices; providing an etch stop layer of silicon dioxide over said surface including said contact openings to said devices; depositing a layer of conductor over said insulating layer; patterning resist over said conductor layer; defining said conductor layer through subtractive etching stopping on said etch stop layer; and, thermally activating said defined conductor and the underlying etch stop layer thereby altering said underlying etch stop layer from insulating to conducting.
Claim 2
Independent Claim 102 words
A method of manufacturing a local interconnection of devices on a semiconductor substrate, comprising: providing a semiconductor substrate containing a plurality of devices and having a surface with contact openings to said devices; providing an etch stop layer of silicon dioxide over said surface including said contact openings to said devices; depositing a layer of conductor over said insulating layer; patterning resist over said conductor layer; defining said conductor layer through subtractive etching stopping on said etch stop layer; and, thermally activating said defined conductor and the underlying etch stop layer thereby altering said underlying etch stop layer from insulating to conducting.
Claim 3
Dependent Claim 20 words
The method of claim 1, wherein said silicon dioxide is selected in the thickness range of 50 to 200 angstroms.
Claim 4
Dependent Claim 11 words
The method of claim 1, wherein said conductor film comprises Ti.
Claim 5
Dependent Claim 22 words
The method of claim 1, wherein said thermal activation is achieved by one of rapid thermal annealing, isothermal heating and laser heating.
Claim 6
Dependent Claim 17 words
The method of claim 1, where said subtractive etching is done in a plasma discharge containing chlorine.

References Cited (Backward Citations)

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-05-14 1999-11-13 2000-05-14 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-05-14 2003-11-13 2004-05-14 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-05-14 2007-11-13 2008-05-14 $7700.00 Window Closed / Lapsed

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