US5486716A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor integrated circuit device with electrostatic damage protection
Assignee: Seiko Instruments Inc
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Filing: 1992-05-08
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Granted: 1996-01-23
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Expires: 2012-05-08
Abstract
Abstract A semiconductor integrated circuit device has a peripheral transistor having a strengthened ESD resistance for external connection. The peripheral transistor has a channel structure effective to release an electrostatic stress current more efficiently than an internal transistor of the semiconductor integrated circuit. In one embodiment, the peripheral transistor has a channel portion that is shorter than the channel portion of an internal transistor. In another embodiment, the peripheral transistor has a substrate contact, a ground line, and an additional resistor interconnection between them to efficiently release an electrostatic stress current. In another embodiment, the peripheral transistor has an asymmetric channel structure so that the distance between the source contact and the gate electrode is set shorter than the distance between the drain contact and the gate electrode. In another embodiment, the peripheral transistor has a drain region and a gate insulating film having a portion of the insulating film that is thinner than the rest of the gate insulating film. In another embodiment, a gate contact is electrically connected between a gate electrode and a metal gate line of the peripheral transistor to reduce a resistance therebetween. In another embodiment, the peripheral transistor has a transistor breakdown voltage that is smaller than a gate breakdown voltage to efficiently release electrostatic stress current.
Inventors
- 👤 Yutaka Saito
- 👤 Jun Osanai
- 👤 Yoshikazu Kojima
- 👤 Masaaki Kamiya
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 17:41
CPC Classifications
H; H10; H10D; H10D89/00; H10D89/60; H10D89/601; H10D89/811
Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
134 words
A semiconductor integrated circuit device, comprising: an internal circuit area including an internal transistor of an insulating gate field effect type, the internal transistor having a channel portion formed with a length limited by a predetermined minimum length value; and a peripheral connection area including an N channel type peripheral transistor of the insulating gate field effect type for use in an external connection, an open-drain output portion and an open-drain output transistor electrically connected to the open-drain output portion, wherein the peripheral transistor is electrically connected to the open-drain output transistor and has a short channel portion formed with a shorter length than the predetermined minimum length value so that an electrostatic stress current applied to the semiconductor integrated circuit is released more efficiently by the peripheral transistor than by the internal transistor.
Claim 2
Dependent Claim
134 words
A semiconductor integrated circuit device, comprising: an internal circuit area including an internal transistor of an insulating gate field effect type, the internal transistor having a channel portion formed with a length limited by a predetermined minimum length value; and a peripheral connection area including an N channel type peripheral transistor of the insulating gate field effect type for use in an external connection, an open-drain output portion and an open-drain output transistor electrically connected to the open-drain output portion, wherein the peripheral transistor is electrically connected to the open-drain output transistor and has a short channel portion formed with a shorter length than the predetermined minimum length value so that an electrostatic stress current applied to the semiconductor integrated circuit is released more efficiently by the peripheral transistor than by the internal transistor.
Claim 3
Dependent Claim
120 words
A semiconductor integrated circuit device, comprising: an internal circuit area including an internal transistor of an insulating gate field effect type, the internal transistor having a channel portion formed with a length limited by a predetermined minimum length value; and a peripheral connection area including an N channel type peripheral transistor of the insulating gate field effect type for use in an external connection, and a CMOS transistor output portion electrically connected to the peripheral transistor, the peripheral transistor having a short channel portion formed with a shorter length than the predetermined minimum length value so that an electrostatic stress current applied to the semiconductor integrated circuit is released more efficiently by the peripheral transistor than by the internal transistor.
Claim 4
Dependent Claim
120 words
A semiconductor integrated circuit device, comprising: an internal circuit area including an internal transistor of an insulating gate field effect type, the internal transistor having a channel portion formed with a length limited by a predetermined minimum length value; and a peripheral connection area including an N channel type peripheral transistor of the insulating gate field effect type for use in an external connection, and a CMOS transistor output portion electrically connected to the peripheral transistor, the peripheral transistor having a short channel portion formed with a shorter length than the predetermined minimum length value so that an electrostatic stress current applied to the semiconductor integrated circuit is released more efficiently by the peripheral transistor than by the internal transistor.
Claim 5
Dependent Claim
138 words
A semiconductor integrated circuit device, comprising: an internal circuit area including an internal transistor of an insulating gate field effect type; and a peripheral connection area including a peripheral transistor of the insulating gate field effect type for use in an external connection, an open-drain output portion and an open-drain output transistor electrically connected to the open-drain output portion, wherein the peripheral transistor has a drain region, a source region, a ground line, and a substrate contact, and the substrate contact being disposed more remote from the drain region than from the source region for electrical connection to the ground line and the peripheral transistor is electrically connected to the open-drain output transistor so that an electrostatic stress current applied to the semiconductor integrated circuit is released more efficiently by the peripheral transistor than by the internal transistor.
Claim 6
Dependent Claim
138 words
A semiconductor integrated circuit device, comprising: an internal circuit area including an internal transistor of an insulating gate field effect type; and a peripheral connection area including a peripheral transistor of the insulating gate field effect type for use in an external connection, an open-drain output portion and an open-drain output transistor electrically connected to the open-drain output portion, wherein the peripheral transistor has a drain region, a source region, a ground line, and a substrate contact, and the substrate contact being disposed more remote from the drain region than from the source region for electrical connection to the ground line and the peripheral transistor is electrically connected to the open-drain output transistor so that an electrostatic stress current applied to the semiconductor integrated circuit is released more efficiently by the peripheral transistor than by the internal transistor.
Claim 7
Dependent Claim
113 words
A semiconductor integrated circuit device, comprising: an internal circuit area including an internal transistor of an insulating gate field effect type; and a peripheral connection area including a peripheral transistor of the insulating gate field effect type for use in an external connection, the peripheral transistor having an asymmetric channel structure having a source contact, a drain contact and a gate electrode such that a distance between the source contact and the gate electrode is set shorter than a distance between the drain contact and the gate electrode so that an electrostatic stress current applied to the semiconductor integrated circuit is released more efficiently by the peripheral transistor than by the internal transistor.
Claim 8
Dependent Claim
113 words
A semiconductor integrated circuit device, comprising: an internal circuit area including an internal transistor of an insulating gate field effect type; and a peripheral connection area including a peripheral transistor of the insulating gate field effect type for use in an external connection, the peripheral transistor having an asymmetric channel structure having a source contact, a drain contact and a gate electrode such that a distance between the source contact and the gate electrode is set shorter than a distance between the drain contact and the gate electrode so that an electrostatic stress current applied to the semiconductor integrated circuit is released more efficiently by the peripheral transistor than by the internal transistor.
Claim 9
Dependent Claim
132 words
A semiconductor integrated circuit device, comprising: an internal circuit area including an internal transistor of an insulating gate field effect type; and a peripheral connection area including an open-drain output portion, an open-drain output transistor electrically connected to the open-drain output portion, and an N channel type peripheral transistor of the insulating gate field effect type for use in an external connection, the peripheral transistor having a drain region, and a gate insulating film having a portion near an edge portion of the drain region being thinner than the rest of the gate insulating film and the peripheral transistor is electrically connected to the open-drain output transistor so that an electrostatic stress current applied to the semiconductor integrated circuit is released more efficiently by the peripheral transistor than by the internal transistor.
Claim 10
Dependent Claim
132 words
A semiconductor integrated circuit device, comprising: an internal circuit area including an internal transistor of an insulating gate field effect type; and a peripheral connection area including an open-drain output portion, an open-drain output transistor electrically connected to the open-drain output portion, and an N channel type peripheral transistor of the insulating gate field effect type for use in an external connection, the peripheral transistor having a drain region, and a gate insulating film having a portion near an edge portion of the drain region being thinner than the rest of the gate insulating film and the peripheral transistor is electrically connected to the open-drain output transistor so that an electrostatic stress current applied to the semiconductor integrated circuit is released more efficiently by the peripheral transistor than by the internal transistor.
Claim 11
Dependent Claim
121 words
A semiconductor integrated circuit device, comprising: an internal circuit area including an internal transistor of an insulating gate field effect type; and a peripheral connection area including an N channel type peripheral transistor of the insulating gate field effect type for use in an external connection, the peripheral transistor having a drain region, and a gate insulating film having a portion near an edge portion of the drain region being thinner than the rest of the gate insulating film, the peripheral connection area further including a CMOS transistor output portion electrically connected to the peripheral transistor so that an electrostatic stress current applied to the semiconductor integrated circuit is released more efficiently by the peripheral transistor than by the internal transistor.
Claim 12
Dependent Claim
121 words
A semiconductor integrated circuit device, comprising: an internal circuit area including an internal transistor of an insulating gate field effect type; and a peripheral connection area including an N channel type peripheral transistor of the insulating gate field effect type for use in an external connection, the peripheral transistor having a drain region, and a gate insulating film having a portion near an edge portion of the drain region being thinner than the rest of the gate insulating film, the peripheral connection area further including a CMOS transistor output portion electrically connected to the peripheral transistor so that an electrostatic stress current applied to the semiconductor integrated circuit is released more efficiently by the peripheral transistor than by the internal transistor.
Claim 13
Dependent Claim
132 words
A semiconductor integrated circuit device, comprising: an internal circuit area including an internal transistor of an insulating gate field effect type; and a peripheral connection area including a peripheral transistor of the insulating gate field effect type for use in an external connection, an open-drain output portion and an open-drain output transistor electrically connected to the open-drain output portion, wherein the peripheral transistor is electrically connected to the open-drain output portion and the peripheral transistor has a gate electrode, a metal gate line, and a gate contact, the gate contact being electrically connected between the gate electrode and the metal gate line to reduce a resistance therebetween so that an electrostatic stress current applied to the semiconductor integrated circuit is released more efficiently by the peripheral transistor than by the internal transistor.
Claim 14
Dependent Claim
132 words
A semiconductor integrated circuit device, comprising: an internal circuit area including an internal transistor of an insulating gate field effect type; and a peripheral connection area including a peripheral transistor of the insulating gate field effect type for use in an external connection, an open-drain output portion and an open-drain output transistor electrically connected to the open-drain output portion, wherein the peripheral transistor is electrically connected to the open-drain output portion and the peripheral transistor has a gate electrode, a metal gate line, and a gate contact, the gate contact being electrically connected between the gate electrode and the metal gate line to reduce a resistance therebetween so that an electrostatic stress current applied to the semiconductor integrated circuit is released more efficiently by the peripheral transistor than by the internal transistor.
Claim 15
Dependent Claim
131 words
A semiconductor integrated circuit device, comprising: an internal circuit area including an internal transistor of an insulating gate field effect type; and a peripheral connection area including an external connection portion and a peripheral transistor of the insulating gate field effect type electrically connected to the external connection portion, the peripheral transistor having an impurity diffusion self-alignment type channel structure having a drain region, a source region and a channel region interposed therebetween, the source region being electrically grounded, the drain region being formed around both the channel region and the source region in a semiconductor substrate and being electrically connected to the external connection portion so that an electrostatic stress current applied to the semiconductor integrated circuit is released more efficiently by the peripheral transistor than by the internal transistor.
Claim 16
Dependent Claim
131 words
A semiconductor integrated circuit device, comprising: an internal circuit area including an internal transistor of an insulating gate field effect type; and a peripheral connection area including an external connection portion and a peripheral transistor of the insulating gate field effect type electrically connected to the external connection portion, the peripheral transistor having an impurity diffusion self-alignment type channel structure having a drain region, a source region and a channel region interposed therebetween, the source region being electrically grounded, the drain region being formed around both the channel region and the source region in a semiconductor substrate and being electrically connected to the external connection portion so that an electrostatic stress current applied to the semiconductor integrated circuit is released more efficiently by the peripheral transistor than by the internal transistor.
Claim 17
Dependent Claim
115 words
A semiconductor integrated circuit device, comprising: an internal circuit area including an internal transistor of an insulating gate field effect type; and a peripheral connection area including a peripheral transistor of the insulating gate field effect type for use in an external connection, and a CMOS transistor output portion electrically connected to the peripheral transistor, the peripheral transistor having a gate electrode, a metal gate line, and a gate contact, the gate contact being electrically connected between the gate electrode and the metal gate line to reduce a resistance therebetween so that an electrostatic stress current applied to the semiconductor integrated circuit is released more efficiently by the peripheral transistor than by the internal transistor.
Claim 18
Dependent Claim
115 words
A semiconductor integrated circuit device, comprising: an internal circuit area including an internal transistor of an insulating gate field effect type; and a peripheral connection area including a peripheral transistor of the insulating gate field effect type for use in an external connection, and a CMOS transistor output portion electrically connected to the peripheral transistor, the peripheral transistor having a gate electrode, a metal gate line, and a gate contact, the gate contact being electrically connected between the gate electrode and the metal gate line to reduce a resistance therebetween so that an electrostatic stress current applied to the semiconductor integrated circuit is released more efficiently by the peripheral transistor than by the internal transistor.
Claim 19
Dependent Claim
91 words
A semiconductor integrated circuit device, comprising: an internal circuit area including a thin film internal transistor of an insulating gate field effect type formed on an insulating layer; and a peripheral connection area including a peripheral transistor of the insulating gate field effect type formed on an insulating layer, the peripheral connection area also including a CMOS transistor output portion electrically connected to the peripheral transistor so that an electrostatic stress current applied to the semiconductor integrated circuit is released more efficiently by the peripheral transistor than by the internal transistor.
Claim 20
Dependent Claim
91 words
A semiconductor integrated circuit device, comprising: an internal circuit area including a thin film internal transistor of an insulating gate field effect type formed on an insulating layer; and a peripheral connection area including a peripheral transistor of the insulating gate field effect type formed on an insulating layer, the peripheral connection area also including a CMOS transistor output portion electrically connected to the peripheral transistor so that an electrostatic stress current applied to the semiconductor integrated circuit is released more efficiently by the peripheral transistor than by the internal transistor.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1999-01-22 | 1999-07-24 | 2000-01-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2003-01-22 | 2003-07-24 | 2004-01-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2007-01-22 | 2007-07-24 | 2008-01-23 | $7700.00 | Window Closed / Lapsed |