Gate protection for a MOSFET

Claim 1

A semiconductor device comprising: a semiconductor substrate of a first conductivity type; a first impurity region of a second conductivity type formed at a first predetermined portion of said semiconductor substrate; a first insulated gate field effect transistor formed inside said first impurity region; a second insulated gate field effect transistor formed at a second predetermined portion of said semiconductor substrate; a second impurity region of the second conductivity type, having a concentration higher than that of said first impurity region, and formed at a third preddetermined portion of said semiconductor substrate; a third insulated gate field effect transistor having a source and drain thereof comprised of third impurity regions of the first conductivity type, and disposed inside said second impurity region; and a fourth impurity region of the second conductivity type, disposed inside said second impurity region, and connected electrically to the source and gate of said third insulated gate field effect transistor, and kept fixed at a ground potential, wherein the drain of said third insulated gate field effect transistor is connected to a gate of at least one of said first and second insulated gate field effect transistors to serve as a protection transistor for preventing destruction of the gate of said at least one transistor that it is connected to.