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Method for fabricating a semiconductor package

Assignee: Motorola Solutions Inc
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Filing: 1993-10-04
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Granted: 1995-11-14
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Expires: 2013-10-04
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Abstract

Abstract A semiconductor package (100) and module (300) includes a unitary base structure (101) and alignment mechanisms (104). The unitary base structure (101) includes a semiconductor mounting area (102) and encircling walls (103). The structure provides resistance to bowing as compared to a flat base. The lack of bowing provides improved thermal contact to a cold plate of the operating environment. The lack of bowing also reduces certain failure modes. The alignment mechanism (104) aligns module components during assembly, thereby simplifying assembly by eliminating the need for complicated fixtures which hold components in place.

Inventors

  • 👤 Guillermo L. Romero

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 20:48
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/60; H10W70/67; H10W70/69; H10W76/00; H10W76/10; H10W76/12; H10W40/00; H10W40/20; H10W40/25; H10W40/257; H10W70/68; H10W76/15; H10W76/17; H10W90/00; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49124; Y10T29/4913; Y10T29/49144

Claims Analysis

Total Claims: 17
Claim 1
Independent Claim 79 words
A method for fabricating a semiconductor package, the method comprising the steps of: fabricating, from a porous matrix material, a unitary base structure that includes encircling walls and a mounting area for mounting a semiconductor device, the step of fabricating including forming an alignment mechanism in at least one of the walls for aligning the semiconductor device in the unitary base structure; and infiltrating the unitary base structure with a conductive material to substantially fill the porous matrix material.
Claim 2
Independent Claim 79 words
A method for fabricating a semiconductor package, the method comprising the steps of: fabricating, from a porous matrix material, a unitary base structure that includes encircling walls and a mounting area for mounting a semiconductor device, the step of fabricating including forming an alignment mechanism in at least one of the walls for aligning the semiconductor device in the unitary base structure; and infiltrating the unitary base structure with a conductive material to substantially fill the porous matrix material.
Claim 3
Dependent Claim 20 words
The method of claim 1, further comprising the step of attaching a ceramic layer in the semiconductor device mounting area.
Claim 4
Dependent Claim 31 words
The method of claim 1, wherein the step of fabricating comprises fabricating using a material selected from the group consisting of silicone carbide and a composite of silver, iron, and nickel.
Claim 5
Dependent Claim 21 words
The method of claim 1, wherein the step of infiltrating comprises infiltrating with one of a metal or a metal alloy.
Claim 6
Dependent Claim 21 words
The method of claim 1, wherein the step of fabricating comprises forming a concave bottom surface on the unitary base structure.
Claim 7
Dependent Claim 28 words
The method of claim 1, further comprising the step of forming, from the conductive material, a base bottom layer on a bottom surface of the unitary base structure.
Claim 8
Independent Claim 56 words
A method for fabricating a semiconductor module, the method comprising the steps of: providing a unitary base structure that includes a semiconductor device mounting area and encircling walls; attaching a layer of ceramic material in the mounting area; mounting a semiconductor device to the ceramic material; and connecting at least one electrode to the semiconductor device.
Claim 9
Independent Claim 56 words
A method for fabricating a semiconductor module, the method comprising the steps of: providing a unitary base structure that includes a semiconductor device mounting area and encircling walls; attaching a layer of ceramic material in the mounting area; mounting a semiconductor device to the ceramic material; and connecting at least one electrode to the semiconductor device.
Claim 10
Dependent Claim 30 words
A method for fabricating a semiconductor module as claimed in claim 7, further including disposing a layer of conductive material between the layer of ceramic material and the semiconductor device.
Claim 11
Dependent Claim 24 words
A method for fabricating a semiconductor module as claimed in claim 7, further including forming an interconnect support mechanism in the unitary base structure.
Claim 12
Dependent Claim 22 words
A method for fabricating a semiconductor module as claimed in claim 7 further including mounting a lid to the unitary base structure.
Claim 13
Independent Claim 60 words
A method for fabricating a semiconductor module, the method comprising the steps of: providing a unitary base structure that includes a semiconductor device mounting area and encircling walls; mounting a semiconductor device to the semiconductor device mounting area; connecting at least one electrode to the semiconductor device; and mounting a circuit board to a notch in one of the walls.
Claim 14
Independent Claim 60 words
A method for fabricating a semiconductor module, the method comprising the steps of: providing a unitary base structure that includes a semiconductor device mounting area and encircling walls; mounting a semiconductor device to the semiconductor device mounting area; connecting at least one electrode to the semiconductor device; and mounting a circuit board to a notch in one of the walls.
Claim 15
Dependent Claim 33 words
A method for fabricating a semiconductor module as claimed in claim 11 further comprising the steps of: covering the semiconductor device with a silicone gel; and placing an epoxy over the silicone gel.
Claim 16
Dependent Claim 31 words
A method for fabricating a semiconductor module as claimed in claim 11 further comprising the step of: attaching a layer of ceramic material between the mounting area and the semiconductor device.
Claim 17
Dependent Claim 31 words
A method for fabricating a semiconductor module as claimed in claim 11 further comprising the step of: placing another semiconductor device on the circuit board; and electrically coupling the semiconductor devices.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1998-11-13 1999-05-15 1999-11-14 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2002-11-13 2003-05-15 2003-11-14 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2006-11-13 2007-05-15 2007-11-14 $7700.00 Window Closed / Lapsed

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