Patent US5340772A successfully refreshed from Google Patents.
← Back to Patent Explorer
US5340772A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of increasing the layout efficiency of dies on a wafer and increasing the ratio of I/O area to active area per die

Assignee: LSI Corp
•
Filing: 1992-07-17
•
Granted: 1994-08-23
•
Expires: 2012-07-17
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract Certain non-square dies, such as triangular dies, greatly elongated rectangular dies, parallelogram dies, trapezoidal, and the like, are able to be laid out in the area of a circular semiconductor wafer more "efficiently" than square dies. Further, a peripheral area of these certain non-square dies is advantageously increased relative to the area contained within the peripheral area, to accommodate increased I/O connections to the active elements of the die.

Inventors

  • 👤 Michael D. Rosotker

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 21:21
CPC Classifications
H; H10; H10W; H10W72/00; H10W72/90; G; G03; G03F; G03F7/00; G03F7/70; G03F7/70425; G03F7/70433; G06; G06F; G06F30/00; G06F30/30; G06F30/39; G06F30/392; H10D; H10D62/00; H10D62/10; H10D62/117; H10D89/00; H10D89/10; H10W70/00; H10W70/40; H10W70/411; H10W70/421; H10W70/435; H10W74/00; H10W74/10; H10W74/111; H10W74/124; H10W72/071; H10W72/075; H10W72/07551; H10W72/07554; H10W72/20; H10W72/29; H10W72/50; H10W72/531; H10W72/5363; H10W72/541; H10W72/5449; H10W72/547; H10W72/551; H10W72/552; H10W72/5522; H10W72/59; H10W72/931; H10W72/932; H10W72/951; H10W90/00; H10W90/701; H10W90/721; H10W90/722; Y; Y10; Y10S; Y10S148/00; Y10S148/028

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 123 words
A method of forming die sites from a semiconductor wafer, comprising: providing a first series of equally spaced-apart scribe lines extending as parallel chords entirely across a selected diameter of a semiconductor wafer, the selected diameter being perpendicular to the first series of scribe lines, areas between adjacent first scribe lines forming a plurality of rows, each row having the same height as the other rows; separating the rows from the wafer, each row having two opposite edges defined by adjacent first parallel scribe lines; after separating the rows, scribing each separated row to form a plurality of individual die sites on each separated row; and after scribing each separated row, singulating the individual die sites from the separated row into nonhomogeneous dies.
Claim 2
Independent Claim 123 words
A method of forming die sites from a semiconductor wafer, comprising: providing a first series of equally spaced-apart scribe lines extending as parallel chords entirely across a selected diameter of a semiconductor wafer, the selected diameter being perpendicular to the first series of scribe lines, areas between adjacent first scribe lines forming a plurality of rows, each row having the same height as the other rows; separating the rows from the wafer, each row having two opposite edges defined by adjacent first parallel scribe lines; after separating the rows, scribing each separated row to form a plurality of individual die sites on each separated row; and after scribing each separated row, singulating the individual die sites from the separated row into nonhomogeneous dies.
Claim 3
Independent Claim 233 words
A method of forming die sites from a semiconductor wafer, comprising: providing a first series of substantially equally spaced-apart scribe lines chordwise across a semiconductor wafer, areas between adjacent first scribe lines forming rows; separating the rows from the wafer, each row having two opposite edges defined by adjacent first parallel scribe lines; after separating the rows, scribing each separated row to form a plurality of individual die sites on each separated row; and after scribing each separated row, singulating the individual die sites from the separated row into nonhomogeneous dies; further comprising: after separating the rows, scribing each separated row with a second series of substantially equally spaced-apart parallel scribe lines extending diagonally at a first angle "Θ" across the separated row, from one opposite edge to another opposite edge of the separated row; and after separating the rows, further scribing each separated row with a third series of substantially equally spaced-apart parallel scribe lines extending diagonally at a second angle "φ" across the separated row, from one opposite edge to another opposite edge of the separated row; the third series of scribe lines being non-intersecting with the second series of scribe lines; and the second angle being diagonally opposite the first angle; wherein: a plurality of areas enclosed by the edges of the row, the second scribe lines and the third scribe lines define a respective plurality of trapezoidal die sites.
Claim 4
Independent Claim 233 words
A method of forming die sites from a semiconductor wafer, comprising: providing a first series of substantially equally spaced-apart scribe lines chordwise across a semiconductor wafer, areas between adjacent first scribe lines forming rows; separating the rows from the wafer, each row having two opposite edges defined by adjacent first parallel scribe lines; after separating the rows, scribing each separated row to form a plurality of individual die sites on each separated row; and after scribing each separated row, singulating the individual die sites from the separated row into nonhomogeneous dies; further comprising: after separating the rows, scribing each separated row with a second series of substantially equally spaced-apart parallel scribe lines extending diagonally at a first angle "Θ" across the separated row, from one opposite edge to another opposite edge of the separated row; and after separating the rows, further scribing each separated row with a third series of substantially equally spaced-apart parallel scribe lines extending diagonally at a second angle "φ" across the separated row, from one opposite edge to another opposite edge of the separated row; the third series of scribe lines being non-intersecting with the second series of scribe lines; and the second angle being diagonally opposite the first angle; wherein: a plurality of areas enclosed by the edges of the row, the second scribe lines and the third scribe lines define a respective plurality of trapezoidal die sites.
Claim 5
Dependent Claim 156 words
A method of forming die sites from a semiconductor wafer, according to claim 1, further comprising: after separating the rows, scribing each separated row with a second series of substantially equally spaced-apart parallel scribe lines extending diagonally at a first angle "Θ" across the separated row, from one opposite edge to another opposite edge of the separated row; and after separating the rows, further scribing each separated row with a third series of substantially equally spaced-apart parallel scribe lines extending diagonally at a second angle "φ" across the separated row, from one opposite edge to another opposite edge of the separated row; the third series of scribe lines being non-intersecting with the second series of scribe lines; and the second angle being diagonally opposite the first angle; wherein: a plurality of areas enclosed by the edges of the row, the second scribe lines and the third scribe lines define a respective plurality of trapezoidal die sites.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1997-08-22 1998-02-21 1998-08-23 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2001-08-22 2002-02-21 2002-08-23 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2005-08-22 2006-02-21 2006-08-23 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag