Patent US5268317A successfully refreshed from Google Patents.
US5268317A
Expired / Lapsed
US
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Method of forming shallow junctions in field effect transistors
Assignee: Qimonda AG
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Filing: 1991-11-12
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Granted: 1993-12-07
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Expires: 2011-11-12
Abstract
Abstract A method of making a MOS field effect transistor having shallow source and drain regions with improved breakdown and leakage characteristics includes the step of forming a layer of a metal silicide along a surface of a body of silicon at each side of a gate which is on an insulated from the surface. A high concentration of an impurity of a desired conductivity type is implanted only into the metal silicide layers. A lower concentration of the impurity is then implanted through the metal silicide layers and into the body just beneath the metal silicide layers. The body is then annealed at a temperature which drives the impurities from the metal silicide layer into the body to form the junctions.
Inventors
- 👤 Udo Schwalke
- 👤 Christoph Zeller
- 👤 Heinrich J. Zeininger
- 👤 Wilfried Hansch
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 21:46
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/80; H10D84/82; H10D84/83; H10P; H10P30/00; H10P30/20; H10P30/202; H10P30/204; H10D30/00; H10D30/01; H10D30/021; H10D30/0223; H10D30/0227; H10D64/00; H10D64/20; H10D64/23; H10D64/251; H10D64/258; H10D64/259; H10P30/21; H10P30/212; H10P32/00; H10P32/10; H10P32/14; H10P32/1408; H10P32/1414; H10P32/17; H10P32/171
Claims Analysis
Total Claims: 31
Claim 1
Independent Claim
193 words
A method of forming a shallow junction in a surface of a silicon body of a first conductivity type, comprising the steps of: forming a metal silicide layer on said surface of said body; doping said metal silicide layer with a first concentration of impurities, wherein said first concentration of impurities are of a second conductivity type which is opposite that of said first conductivity type, and wherein said doping of said metal silicide layer is achieved by ion implantation, said ion implantation being performed at a first energy level whereby said first concentration of impurities are deposited in said metal silicide layer and substantially none of said first concentration of impurities penetrates into said body below said metal silicide layer; implanting a second concentration of impurities through said metal silicide layer and into a region of said body below said metal silicide layer, wherein said second concentration of impurities are of said second conductivity type; and diffusing said first concentration of impurities from said metal silicide layer into said body, wherein the diffused first concentration of impurities is enclosed within said region containing said second concentration of impurities to form said junction.
Claim 2
Independent Claim
193 words
A method of forming a shallow junction in a surface of a silicon body of a first conductivity type, comprising the steps of: forming a metal silicide layer on said surface of said body; doping said metal silicide layer with a first concentration of impurities, wherein said first concentration of impurities are of a second conductivity type which is opposite that of said first conductivity type, and wherein said doping of said metal silicide layer is achieved by ion implantation, said ion implantation being performed at a first energy level whereby said first concentration of impurities are deposited in said metal silicide layer and substantially none of said first concentration of impurities penetrates into said body below said metal silicide layer; implanting a second concentration of impurities through said metal silicide layer and into a region of said body below said metal silicide layer, wherein said second concentration of impurities are of said second conductivity type; and diffusing said first concentration of impurities from said metal silicide layer into said body, wherein the diffused first concentration of impurities is enclosed within said region containing said second concentration of impurities to form said junction.
Claim 3
Dependent Claim
27 words
The method of claim 1 in which said first concentration of impurities is about 5×10 15 impurities/cm 2 and said first energy level is about 20 keV.
Claim 4
Dependent Claim
25 words
The method of claim 1 in which said second concentration of impurities are implanted through said metal silicide layer into said body by ion implantation.
Claim 5
Dependent Claim
62 words
The method of claim 3 in which said second concentration of impurities implanted through said metal silicide layer into said body is less than said first concentration of impurities implanted into said metal silicide layer, the ion implantation of said second concentration of impurities into said body being conducted at a second energy level that is higher than said first energy level.
Claim 6
Dependent Claim
37 words
The method of claim 4 in which said second concentration of impurities implanted through said metal silicide layer and into said body is about 3×10 14 impurities/cm 2 and said second energy level is about 150 keV.
Claim 7
Dependent Claim
27 words
The method of claim 5 in which said first concentration of impurities is about 5×10 15 impurities/cm 2 and said first energy level is about 20 keV.
Claim 8
Dependent Claim
38 words
The method of claim 4 in which said metal silicide layer is formed by depositing a layer of a metal on said surface of said body and heating said body to a temperature which forms a metal silicide.
Claim 9
Dependent Claim
26 words
The method of claim 7 in which said first concentration of impurities are diffused from said metal silicide layer into said body by heating said body.
Claim 10
Dependent Claim
37 words
The method of claim 8 in which said body is heated at a temperature of about 900° C. for about 5 minutes to diffuse said first concentration of impurities from said metal silicide layer into said body.
Claim 11
Independent Claim
225 words
A method of making a field effect transistor having shallow source and drain regions comprising the steps of: providing a silicon body having a first conductivity type; forming on a surface of said body a conductive gate which is insulated from said surface; forming a metal silicide layer on said surface of said body at points adjacent said gate; doping each said metal silicide layer with a first concentration of impurities, wherein said first concentration of impurities are of a second conductivity type which is opposite that of said first conductivity type, and wherein said doping of said metal silicide layer is achieved by ion implantation, said ion implantation being performed at a first energy level whereby said first concentration of impurities are deposited in said metal silicide layer and substantially none of said first concentration of impurities penetrates into said body below said metal silicide layer; implanting a second concentration of impurities through each said metal silicide layer and into a region of said body below each said metal silicide layer, wherein said second concentration of impurities are of said second conductivity type; diffusing said first concentration of impurities from each of said metal silicide layer into said body, wherein the diffused first concentration of impurities is enclosed within said region containing said second concentration of impurities to form said source and drain regions.
Claim 12
Independent Claim
225 words
A method of making a field effect transistor having shallow source and drain regions comprising the steps of: providing a silicon body having a first conductivity type; forming on a surface of said body a conductive gate which is insulated from said surface; forming a metal silicide layer on said surface of said body at points adjacent said gate; doping each said metal silicide layer with a first concentration of impurities, wherein said first concentration of impurities are of a second conductivity type which is opposite that of said first conductivity type, and wherein said doping of said metal silicide layer is achieved by ion implantation, said ion implantation being performed at a first energy level whereby said first concentration of impurities are deposited in said metal silicide layer and substantially none of said first concentration of impurities penetrates into said body below said metal silicide layer; implanting a second concentration of impurities through each said metal silicide layer and into a region of said body below each said metal silicide layer, wherein said second concentration of impurities are of said second conductivity type; diffusing said first concentration of impurities from each of said metal silicide layer into said body, wherein the diffused first concentration of impurities is enclosed within said region containing said second concentration of impurities to form said source and drain regions.
Claim 13
Dependent Claim
26 words
The method of claim 10 in which said first concentration of impurities is about 5×10 15 impurities/cm 2 and said first energy is about 20 keV.
Claim 14
Dependent Claim
26 words
The method of claim 10 in which said second concentration of impurities are implanted through each said metal silicide layer into said body by ion implantation.
Claim 15
Dependent Claim
64 words
The method of claim 12 in which said second concentration of impurities implanted through each said metal silicide layer into said body is less than said first concentration of impurities implanted into each said metal silicide layer, the ion implantation of said second concentration of impurities into said body being conducted at a second energy level that is higher than said first energy level.
Claim 16
Dependent Claim
38 words
The method of claim 13 in which said second concentration of impurities implanted through each said metal silicide layer and into said body is about 3×10 14 impurities/cm 2 and said second energy level is about 150 keV.
Claim 17
Dependent Claim
39 words
The method of claim 13 in which each said metal silicide layer is formed by depositing a layer of a metal on said surface of said body and heating said body to a temperature which forms a metal silicide.
Claim 18
Dependent Claim
27 words
The method of claim 14 in which said first concentration of impurities are diffused from each said metal silicide layer into said body by heating said body.
Claim 19
Dependent Claim
38 words
The method of claim 16 in which said body is heated at a temperature of about 900° C. for about 5 minutes to diffuse said first concentration of impurities from each said metal silicide layer into said body.
Claim 20
Dependent Claim
38 words
The method of claim 10 in which prior to forming each said metal silicide layer, sidewall spacers of silicon dioxide are formed against said gate and said metal silicide layer is formed adjacent each of said sidewall spacers.
Claim 21
Independent Claim
269 words
A method of making a field effect transistor having shallow source and drain regions comprising the steps of: providing a silicon body having a first conductivity type; forming spaced isolation regions of silicon dioxide on a surface of said body; forming on at least a portion of said surface of said body between each of said isolation regions a thin gate dielectric layer; forming on said gate dielectric layer and spaced from each of said isolation regions a gate of conductive polysilicon; forming a metal silicide layer along said surface of said body between said gate and each of said isolation regions; doping each said metal silicide layer with a first concentration of impurities, wherein said first concentration of impurities are of a second conductivity type which is opposite that of said first conductivity type, and wherein said doping of said metal silicide layer is achieved by ion implantation, said ion implantation being performed at a first energy level whereby said first concentration of impurities are deposited in said metal silicide layer and substantially none of said first concentration of impurities penetrates into said body below said metal silicide layer; implanting a second concentration of impurities through each said metal silicide layer and into a region of said body below each said metal silicide layer, wherein said second concentration of impurities are of said second conductivity type; and diffusing said first concentration of impurities from each of said metal silicide layer into said body, wherein the diffused first concentration of impurities is enclosed within said region containing said second concentration of impurities to form said source and drain regions.
Claim 22
Independent Claim
269 words
A method of making a field effect transistor having shallow source and drain regions comprising the steps of: providing a silicon body having a first conductivity type; forming spaced isolation regions of silicon dioxide on a surface of said body; forming on at least a portion of said surface of said body between each of said isolation regions a thin gate dielectric layer; forming on said gate dielectric layer and spaced from each of said isolation regions a gate of conductive polysilicon; forming a metal silicide layer along said surface of said body between said gate and each of said isolation regions; doping each said metal silicide layer with a first concentration of impurities, wherein said first concentration of impurities are of a second conductivity type which is opposite that of said first conductivity type, and wherein said doping of said metal silicide layer is achieved by ion implantation, said ion implantation being performed at a first energy level whereby said first concentration of impurities are deposited in said metal silicide layer and substantially none of said first concentration of impurities penetrates into said body below said metal silicide layer; implanting a second concentration of impurities through each said metal silicide layer and into a region of said body below each said metal silicide layer, wherein said second concentration of impurities are of said second conductivity type; and diffusing said first concentration of impurities from each of said metal silicide layer into said body, wherein the diffused first concentration of impurities is enclosed within said region containing said second concentration of impurities to form said source and drain regions.
Claim 23
Dependent Claim
26 words
The method of claim 19 in which said second concentration of impurities are implanted through each said metal silicide layer into said body by ion implantation.
Claim 24
Dependent Claim
64 words
The method of claim 20 in which said second concentration of impurities implanted through each said metal silicide layer into said body is less than said first concentration of impurities implanted into each said metal silicide layer, the ion implantation of said second concentration of impurities into said body being conducted at a second energy level that is higher than said first energy level.
Claim 25
Dependent Claim
48 words
The method of claim 21 in which said first concentration of impurities is about 5×10 15 impurities/cm 2 and said first energy level is about 20 keV, and said second concentration of impurities is about 3×10 14 impurities/cm 3 and said second energy level is about 150 keV.
Claim 26
Dependent Claim
39 words
The method of claim 20 in which each said metal silicide layer is formed by depositing a layer of a metal on said surface of said body and heating said body to a temperature which forms a metal silicide.
Claim 27
Dependent Claim
27 words
The method of claim 23 in which said first concentration of impurities are diffused from each said metal silicide layer into said body by heating said body.
Claim 28
Dependent Claim
46 words
The method of claim 24 in which prior to forming each said metal silicide layer a sidewall spacer is formed along each side of said gate, such that each metal silicide layer is formed between one of said sidewall spacers and one of said isolation regions.
Claim 29
Dependent Claim
14 words
A field effect transistor having a junction made by the process of claim 1.
Claim 30
Dependent Claim
14 words
A field effect transistor having a junction made by the process of claim 10.
Claim 31
Dependent Claim
14 words
A field effect transistor having a junction made by the process of claim 19.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-12-06 | 1997-06-07 | 1997-12-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-12-06 | 2001-06-07 | 2001-12-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-12-06 | 2005-06-07 | 2005-12-07 | $7700.00 | Window Closed / Lapsed |