US4622735A
Expired / Lapsed
US
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Method for manufacturing a semiconductor device utilizing self-aligned silicide regions
Assignee: Toshiba Corp
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Filing: 1984-08-29
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Granted: 1986-11-18
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Expires: 2004-08-29
Abstract
Abstract A method for manufacturing a semiconductor device of the invention comprises the steps of (a) forming a gate insulating film on a surface of a silicon substrate, and a gate electrode on said gate insulating film; (b) forming a self-aligned insulating film at least on a side wall of said gate electrode; (c) forming a self-aligned metal or metal silicide film on a region on which an insulating film is not formed, said region including a source region, a drain region and a diffusion interconnection region which is an extended part of at least one of said source region and said drain region, or prospective regions for said source, drain and diffusion interconnection regions; and (d) forming said source region, said drain region and said diffusion interconnected region which is the extended part of at least one of said source region and said drain region, by doping at least one time said substrate with an impurity which has a conductivity type opposite to a conductivity type of said silicon substrate any time after step (a).
Inventors
- 👤 Tadashi Shibata
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 10:12
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0223; H10D30/0212; H10D30/0227; H10D30/60; H10D62/00; H10D62/80; H10D62/83; H10D64/00; H10D64/01; H10D64/011; H10D64/0111; H10D64/0112; H10D64/015; H10D64/20; H10D64/23; H10D64/251; H10D64/258; H10D64/259; H10D64/60; H10D64/62; H10D64/66; H10D64/661; H10D64/662; H10D64/663; H10P; H10P76/00; H10P76/40; H10P76/408; H10P76/4085; H10W; H10W20/00; H10W20/01; Y; Y10; Y10S; Y10S148/00; Y10S148/019; Y10S148/02; Y10S148/106; Y10S148/139; Y10S148/141; Y10S148/147; Y10S148/156; Y10S257/00; Y10S257/902
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
178 words
A method for manufacturing a semiconductor device, comprising the following steps in the following order: (a) forming a gate insulating film on a surface of a silicon substrate, and a gate electrode on said gate insulating film; (b) forming a source region and a drain region by doping said substrate with an impurity which has a conductivity type opposite to a conductivity type of said silicon substrate; (c) forming an insulating layer covering the entire surface of said substrate and etching the insulating layer by an anisotropic etching, thus leaving the self-aligned insulating layer on the side walls of said gate electrode; (d) depositing a metal on the entire surface, forming a metal silicide film on the silicon surface by reacting silicon with the metal which is in contact with the silicon, and eliminating unreacted metal, thus forming self-aligned metal silicide films on regions on which an insulating film is not formed, said region including said source region and said drain region; and (e) forming electrodes which are connected to the source region, drain region and gate electrode.
Claim 2
Independent Claim
178 words
A method for manufacturing a semiconductor device, comprising the following steps in the following order: (a) forming a gate insulating film on a surface of a silicon substrate, and a gate electrode on said gate insulating film; (b) forming a source region and a drain region by doping said substrate with an impurity which has a conductivity type opposite to a conductivity type of said silicon substrate; (c) forming an insulating layer covering the entire surface of said substrate and etching the insulating layer by an anisotropic etching, thus leaving the self-aligned insulating layer on the side walls of said gate electrode; (d) depositing a metal on the entire surface, forming a metal silicide film on the silicon surface by reacting silicon with the metal which is in contact with the silicon, and eliminating unreacted metal, thus forming self-aligned metal silicide films on regions on which an insulating film is not formed, said region including said source region and said drain region; and (e) forming electrodes which are connected to the source region, drain region and gate electrode.
Claim 3
Dependent Claim
18 words
A method according to claim 1, wherein said anisotropic etching method is reactive ion etching or sputtering etching.
Claim 4
Dependent Claim
26 words
A method according to claim 2, further including the step of etching a surface of said silicon substrate which is exposed by the anisotropic etching method.
Claim 5
Dependent Claim
36 words
A method according to claim 1, further including the step of performing phosphorus gettering in an atmosphere at high temperature containing phosphorus, after said insulating film is formed to cover the entire surface of the substrate.
Claim 6
Dependent Claim
27 words
A method according to claim 1, wherein the metal is a member selected from the group consisting of W, Pd, Pt, Ni, Mo, Nb, Ta and Ir.
Claim 7
Dependent Claim
59 words
A method according to claim 1, wherein step (c) includes the steps of heating said silicon substrate at a temperature lower than a temperature for forming an alloy of the silicon and metal, surrounding said silicon substrate with a metal halide gas and a reducing gas, and depositing a metal film on the exposed surface of said silicon substrate.
Claim 8
Dependent Claim
26 words
A method according to claim 6, wherein the metal is a member selected from the group consisting of W, Pd, Pt, Ni, Mo, Nb and Ta.
Claim 9
Dependent Claim
46 words
A method according to claim 1, 2, 3 or 4, further comprising the step of doping said substrate with an impurity which has a conductivity type opposite to a conductivity type of said silicon substrate at a dose higher than that in doping of step (b).
Claim 10
Dependent Claim
19 words
A method according to claim 1, wherein the reaction between the metal and silicon is performed by thermal annealing.
Claim 11
Dependent Claim
20 words
A method according to claim 1, wherein the reaction between the metal and silicon is performed by laser beam irradiation.
Claim 12
Dependent Claim
32 words
A method according to claim 1, wherein the reaction between the metal and silicon is performed by ion implanting an impurity into the substrate through the metal and thermally annealing the substrate.
Claim 13
Dependent Claim
33 words
A method according to claim 1, wherein, between steps (a) and (b), thermal oxidation is performed to form an oxide film on the surfaces of the gate electrode, source region and drain region.
References Cited (Backward Citations)
US4074300A
Cited
US4069067A
Cited
US3958323A
Cited
US4210993A
Cited
US4080719A
Cited
US4085498A
Cited
FR2358750A1
Cited
US4141022A
Cited
US4224733A
Cited
US4221044A
Cited
US4287661A
Cited
US4356040A
Cited
US4356040B1
Cited
US4330931A
Cited
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