US5198378A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Process of fabricating elevated source/drain transistor
Assignee: Texas Instruments Inc
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Filing: 1990-12-10
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Granted: 1993-03-30
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Expires: 2010-12-10
Abstract
Abstract An elevated transistor is provided having minimized junctions (33) and a polysilicon pad (27) over the transistor insulating regions (12) and partially over the moat (14). A conductive layer (32) overlays the polysilicon pad (27) and partially overlays the moat (14) in the interim areas (29).
Inventors
- 👤 Mark S. Rodder
- 👤 Richard A. Chapman
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 18:38
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/027; H10D30/0275; H10D30/60; H10D64/00; H10D64/20; H10D64/23; H10D64/251; H10D64/258; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/064; H10W20/066; Y; Y10; Y10S; Y10S257/00; Y10S257/90
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
121 words
A method for forming a transistor, comprising the steps of: forming insulating regions surrounding an active device area in a face of a substrate; forming a gate insulating layer on the surface of said active device area, forming a gate on said gate insulating layer; forming sidewall insulating layers on the sidewalls of said gate; forming at least a first conductive layer on said gate insulating layer, said first conductive layer extending onto said insulating regions; removing the portion of said gate insulating layer between said first conductive layer and said sidewall insulating layers; and forming by selective epitaxial deposition a second conductive layer, said selective deposition being selective to the exposed portion of said substrate and said first conductive layer.
Claim 2
Independent Claim
121 words
A method for forming a transistor, comprising the steps of: forming insulating regions surrounding an active device area in a face of a substrate; forming a gate insulating layer on the surface of said active device area, forming a gate on said gate insulating layer; forming sidewall insulating layers on the sidewalls of said gate; forming at least a first conductive layer on said gate insulating layer, said first conductive layer extending onto said insulating regions; removing the portion of said gate insulating layer between said first conductive layer and said sidewall insulating layers; and forming by selective epitaxial deposition a second conductive layer, said selective deposition being selective to the exposed portion of said substrate and said first conductive layer.
Claim 3
Dependent Claim
103 words
A method as in claim 1 further comprising the steps of: forming a third conductive layer on said gate insulating layer, aid third conductive layer extending onto said insulating regions, said third conductive layer being positioned in opposition to said first conductive layer relative to said gate, said gate being positioned between said first and third conductive layers; removing the portion of said gate insulating layer between said third conductive layer and said sidewall insulating layers; and forming by selective epitaxial deposition a fourth conductive layer, said selective deposition being selective to the exposed portion of said substrate and said third conductive layer.
Claim 4
Dependent Claim
30 words
A method as in claim 1 further comprising the step of forming a doped region in said substrate by diffusing dopant atoms from said second conductive layer into said substrate.
Claim 5
Dependent Claim
34 words
A method as in claim 2 further comprising the step of forming a source and a drain in said substrate by diffusing dopant atoms from said second and fourth conductive layers into said substrate.
Claim 6
Dependent Claim
18 words
A method as in claim 1 wherein said insulating regions comprise silicon dioxide regions formed by thermal oxidation.
Claim 7
Dependent Claim
12 words
A method as in claim 1 wherein said substrate comprises crystalline silicon.
Claim 8
Dependent Claim
23 words
A method as in claim 1 further comprising the step of forming a highly conductive layer on the surface of second conductive layer.
Claim 9
Dependent Claim
16 words
A method as in claim 7 wherein said highly conductive region comprises a refractory metal silicide.
Claim 10
Dependent Claim
23 words
A method as in claim 2 further comprising the step of forming a highly conductive layer on the surface of fourth conductive layer.
Claim 11
Dependent Claim
16 words
A method as in claim 9 wherein said highly conductive region comprises a refractory metal silicide.
Claim 12
Independent Claim
129 words
A method for forming a transistor, comprising the steps of: forming field insulating regions surrounding an active device area in a face of a substrate; forming a gate silicon dioxide layer on the surface of said active device area; forming a gate on said gate silicon dioxide layer; forming sidewall insulating layers on the sidewalls of said gate; forming at least a first polysilicon layer on said gate insulating layer, said first polycrystalline silicon layer extending onto said field insulating regions; removing the portion of said gate silicon dioxide layer between said first polycrystalline silicon layer and said sidewall insulating layers; and forming by selective epitaxial deposition a second silicon layer, said selective deposition being selective to the exposed portion of said substrate and said first polycrystalline silicon layer.
Claim 13
Independent Claim
129 words
A method for forming a transistor, comprising the steps of: forming field insulating regions surrounding an active device area in a face of a substrate; forming a gate silicon dioxide layer on the surface of said active device area; forming a gate on said gate silicon dioxide layer; forming sidewall insulating layers on the sidewalls of said gate; forming at least a first polysilicon layer on said gate insulating layer, said first polycrystalline silicon layer extending onto said field insulating regions; removing the portion of said gate silicon dioxide layer between said first polycrystalline silicon layer and said sidewall insulating layers; and forming by selective epitaxial deposition a second silicon layer, said selective deposition being selective to the exposed portion of said substrate and said first polycrystalline silicon layer.
Claim 14
Dependent Claim
113 words
A method as in claim 11 further comprising the steps of: forming a third polycrystalline silicon layer on said gate silicon dioxide layer, said third polycrystalline silicon layer extending onto said field insulating regions, said third polycrystalline silicon layer being positioned in opposition to said first polycrystalline silicon layer relative to said gate, said gate being positioned between said first and third polycrystalline silicon layers; removing the portion of said gate silicon dioxide layer between said third polycrystalline silicon layer and said sidewall insulating layers; and forming by selective epitaxial deposition a fourth silicon layer, said selective deposition being selective to the exposed portion of said substrate and said third polycrystalline silicon layer.
Claim 15
Dependent Claim
29 words
A method of claim 11 further comprising the step of forming a doped region in said substrate by diffusing dopant atoms from said second silicon layer into said substrate.
Claim 16
Dependent Claim
34 words
A method as in claim 12 further comprising the step of forming a source and a drain in said substrate by diffusing dopant atoms from said second and fourth silicon layers into said substrate.
Claim 17
Dependent Claim
18 words
A method as in claim 11 wherein said insulating regions comprise silicon dioxide regions formed by thermal oxidation.
Claim 18
Dependent Claim
12 words
A method as in claim 11 wherein said substrate comprises crystalline silicon.
Claim 19
Dependent Claim
23 words
A method as in claim 11 further comprising the step of forming a highly conductive layer on the surface of second conductive layer.
Claim 20
Dependent Claim
16 words
A method as in claim 17 wherein said highly conductive region comprises a refractory metal silicide.
Claim 21
Dependent Claim
23 words
A method as in claim 12 further comprising the step of forming a highly conductive layer on the surface of fourth conductive layer.
Claim 22
Dependent Claim
16 words
A method as in claim 19 wherein said highly conductive region comprises a refractory metal silicide.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-03-29 | 1996-09-28 | 1997-03-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-03-29 | 2000-09-28 | 2001-03-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-03-29 | 2004-09-28 | 2005-03-30 | $7700.00 | Window Closed / Lapsed |