Field effect transistor having self-registering source and drain regions to minimize capacitances

Claim 1

A semiconductor device including at least one field effect transistor, said device comprising a semiconductor substrate of a first conductivity type, a first insulating layer on said substrate, said first insulating layer having at least one opening to said substrate, a polycrystalline epitaxial layer of a second conductivity type on said first insulating layer and a monocrystalline epitaxial layer of said second conductivity type on said substrate within said opening, at least one recess extending through said monocrystalline layer and into said substrate, said recess being covered with a second insulating layer, wherein said field effect transistor is defined by a source region of said monocrystalline layer and a first surface zone of said second conductivity type in said substrate at a first side of said recess, by a drain region of said monocrystalline layer and a second surface zone of said second conductivity type in said substrate at a second side of said recess opposite to said first side, and by a gate electrode over said second insulating layer in said recess, and wherein a channel region is defined in said substrate below said recess between said source region and said drain region, said channel region extending between said surface zones.