Patent US5095267A successfully refreshed from Google Patents.
US5095267A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of screening A.C. performance characteristics during D.C. parametric test operation
Assignee: National Semiconductor Corp
•
Filing: 1991-05-29
•
Granted: 1992-03-10
•
Expires: 2011-05-29
Abstract
Abstract A method of characterizing A.C. performance of an integrated circuit based upon D.C. measurements utilizing a process monitor circuit. The process monitor circuit provides a D.C. output having a magnitude which varies with the frequency of an oscillator section of the monitor circuit. The frequency is a function of both A.C. and D.C. performance, therefore the process monitor output signal is indicative of such performance. Since D.C. measurements may be made while the integrated circuits are in wafer form utilizing a conventional wafer prober and parametric tester, it is possible to detect A.C. performance problems very early in the manufacturing process.
Inventors
- 👤 Richard B. Merrill
- 👤 Edson D. Gomersall
- 👤 Enayet O. Issaq
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 12:42
CPC Classifications
G; G01; G01R; G01R31/00; G01R31/28; G01R31/316
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
143 words
A wafer of semiconductor material comprising: (1) a multiplicity of integrated circuit devices; and (2) at least one process monitor circuit means in said wafer separate from said integrated circuit devices for producing a process monitor output signal indicative of the performance of said integrated circuit devices, said process monitor circuit means including (a) oscillator means for producing an oscillator output signal having a frequency which varies with said performance; (b) means for receiving the output of a current source; (c) means for receiving one terminal of an external reference capacitor; (d) switching means responsive to said oscillator output signal for charging said capacitor with current from said current source for a charge period which is a function of said oscillator output signal so as to produce said process monitor output signal across said reference capacitor at the end of said charge period.
Claim 2
Dependent Claim
143 words
A wafer of semiconductor material comprising: (1) a multiplicity of integrated circuit devices; and (2) at least one process monitor circuit means in said wafer separate from said integrated circuit devices for producing a process monitor output signal indicative of the performance of said integrated circuit devices, said process monitor circuit means including (a) oscillator means for producing an oscillator output signal having a frequency which varies with said performance; (b) means for receiving the output of a current source; (c) means for receiving one terminal of an external reference capacitor; (d) switching means responsive to said oscillator output signal for charging said capacitor with current from said current source for a charge period which is a function of said oscillator output signal so as to produce said process monitor output signal across said reference capacitor at the end of said charge period.
Claim 3
Dependent Claim
30 words
The wafer of claim 1 wherein said process monitor circuit means includes frequency divider means for reducing the frequency of said oscillator output signal and for controlling said switching means.
Claim 4
Dependent Claim
20 words
The wafer of claim 2 wherein said oscillator means includes a ring oscillator comprised of a plurality of inverter circuits.
Claim 5
Dependent Claim
42 words
The wafer of claim 3 wherein said switching means is also a means for generating a trigger voltage at the end of said charge period to be used by an external voltmeter to sample said process monitor signal across said reference capacitor.
References Cited (Backward Citations)
US4045736A
Cited
US3781670A
Cited
US3922707A
Cited
US4403287A
Cited
US4808915A
Cited
JPS6065542A
Cited
US4606025A
Cited
JPS60119748A
Cited
JPS6130044A
Cited
US4801875A
Cited
US4918385A
Cited
US4945540A
Cited
US4904883A
Cited
US4904883B1
Cited
US5014226A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-03-10 | 1995-09-09 | 1996-03-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-03-10 | 1999-09-09 | 2000-03-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-03-10 | 2003-09-09 | 2004-03-10 | $7700.00 | Window Closed / Lapsed |