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JPS6130044A Expired / Lapsed JP ⏱️ 0.0 years remaining

Semiconductor chip inspection method

Assignee: Denso Corp
•
Filing: 1984-07-20
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Granted: —
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Expires: 2004-07-20
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Abstract

Abstract PURPOSE:To simply discriminate defective and good chips for EPROM before writing specified data by providing a dummy pad not connected with an external terminal and a memory means which is connected thereto and is fusible on a semiconductor chip. CONSTITUTION:A wafer is subjected to the function test and a memory means consisting of a resistance body 14 is fused by applying a heavy current across the dummy pads 13-15 for a defective chip. For a good chip, predetermined information is written. Thereafter, before starting the test after the screening, a current is applied across the dummy pads 13-15. If these are not conductive, succeeding tests are avoided. When these are conductive, test is carried out for checking defective and good chips and these are colored for discrimination. According to this method, good chips placed at random on the wafer can be recognized. Junction breakdown of diode can also be utilized in place of the resistance body 14 such as a fuse.

Inventors

  • 👤 Koji Senbokuya
  • 👤 仙北屋 浩二
  • 👤 Mitsuharu Kato
  • 👤 光治 加藤

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-24 12:30
CPC Classifications
H; H10; H10W; H10W46/00; H10W46/401; H10W46/403

Claims Analysis

Total Claims: 0
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References Cited (Backward Citations)

JPS5535854A Cited
JPS58103151A Cited

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